AD7705 Analog Devices, AD7705 Datasheet

no-image

AD7705

Manufacturer Part Number
AD7705
Description
3V/5V, 1 mW, 2-Channel Differential, 16-Bit Sigma-Delta ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7705

Resolution (bits)
16bit
# Chan
2
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Bip,Diff-Uni
Ain Range
Bip (Vref)/(PGA Gain),Uni (Vref)/(PGA Gain)
Adc Architecture
Sigma-Delta
Pkg Type
DIP,SOIC,SOP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7705
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7705BN
Manufacturer:
ADI
Quantity:
153
Part Number:
AD7705BNZ
Manufacturer:
ADI
Quantity:
5
Part Number:
AD7705BNZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7705BR
Manufacturer:
AD
Quantity:
1
Part Number:
AD7705BR
Manufacturer:
ADI
Quantity:
154
Part Number:
AD7705BR-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7705BRU
Manufacturer:
AD
Quantity:
45
Part Number:
AD7705BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD7705BRUZ-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
FEATURES
AD7705: 2 fully differential input channel ADCs
AD7706: 3 pseudo differential input channel ADCs
Programmable gain front end: gains from 1 to 128
3-wire serial interface
Ability to buffer the analog input
2.7 V to 3.3 V or 4.75 V to 5.25 V operation
Power dissipation 1 mW maximum @ 3 V
Standby current 8 μA maximum
16-lead PDIP, 16-lead SOIC, and 16-lead TSSOP packages
GENERAL DESCRIPTION
The AD7705/AD7706 are complete analog front ends for low
frequency measurement applications. These 2-/3-channel devices
can accept low level input signals directly from a transducer and
produce serial digital output. The devices employ a Σ-Δ
conversion technique to realize up to 16 bits of no missing codes
performance. The selected input signal is applied to a
proprietary, programmable-gain front end based around an
analog modulator. The modulator output is processed by an on-
chip digital filter. The first notch of this digital filter can be pro-
grammed via an on-chip control register, allowing adjustment of
the filter cutoff and output update rate.
The AD7705/AD7706 devices operate from a single 2.7 V to
3.3 V or 4.75 V to 5.25 V supply. The AD7705 features two fully
differential analog input channels; the AD7706 features three
pseudo differential input channels.
Both devices feature a differential reference input. Input signal
ranges of 0 mV to 20 mV through 0 V to 2.5 V can be
incorporated on both devices when operating with a V
and a reference of 2.5 V. They can also handle bipolar input
signal ranges of ±20 mV through ±2.5 V, which are referenced to
the AIN(−) inputs on the AD7705 and to the COMMON input
on the AD7706.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
16 bits no missing codes
0.003% nonlinearity
SPI®-, QSPI™-, MICROWIRE™-, and DSP-compatible
Schmitt-trigger input on SCLK
DD
of 5 V
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
The AD7705/AD7706 devices, with a 3 V supply and a 1.225 V
reference, can handle unipolar input signal ranges of 0 mV to
10 mV through 0 V to 1.225 V. The devices can accept bipolar
input ranges of ±10 mV through ±1.225 V. Therefore, the
AD7705/AD7706 devices perform all signal conditioning and
conversion for a 2-channel or 3-channel system.
The AD7705/AD7706 are ideal for use in smart, microcontroller,
or DSP-based systems. The devices feature a serial interface that
can be configured for 3-wire operation. Gain settings, signal
polarity, and update rate selection can be configured in software
using the input serial port. The parts contains self-calibration and
system calibration options to eliminate gain and offset errors on
the part itself or in the system. CMOS construction ensures very
low power dissipation, and the power-down mode reduces the
standby power consumption to 20 μW typ.
These parts are available in a 16-lead, wide body (0.3 inch),
plastic dual in-line package (DIP); a 16-lead, wide body
(0.3 inch), standard small outline (SOIC) package; and a low
profile, 16-lead, thin shrink small outline package (TSSOP).
CHANNELS
MCLK OUT
ANALOG
MCLK IN
3 V/5 V, 1 mW, 2-/3-Channel,
INPUT
16-Bit, Sigma-Delta ADCs
FUNCTIONAL BLOCK DIAGRAM
MAX
V
DD
GND
GENERATION
CLOCK
REF IN(–)
BUFFER
©2006 Analog Devices, Inc. All rights reserved.
A = 1 ≈ 128
Figure 1.
REF IN(+)
AD7705/AD7706
PGA
SERIAL INTERFACE
REGISTER BANK
A/D CONVERTER
DIGITAL FILTER
MODULATOR
BALANCING
AD7705/AD7706
CHARGE
DRDY
Σ -Δ
RESET
www.analog.com
SCLK
CS
DIN
DOUT

Related parts for AD7705

AD7705 Summary of contents

Page 1

... The AD7705/AD7706 devices operate from a single 5.25 V supply. The AD7705 features two fully differential analog input channels; the AD7706 features three pseudo differential input channels. ...

Page 2

... Accuracy ...................................................................................... 29 Drift Considerations .................................................................. 29 Power Supplies ............................................................................ 30 Supply Current............................................................................ 30 Grounding and Layout .............................................................. 30 Evaluating the Performance...................................................... 31 Digital Interface.......................................................................... 31 Configuring the AD7705/AD7706 .......................................... 33 Microcomputer/Microprocessor Interfacing ......................... 34 Code For Setting Up the AD7705/AD7706............................ 35 Applications..................................................................................... 38 Pressure Measurement............................................................... 38 Temperature Measurement ....................................................... 39 Smart Transmitters..................................................................... 40 Battery Monitoring .................................................................... 41 Outline Dimensions ....................................................................... 42 Ordering Guide .......................................................................... 43 Rev Page ...

Page 3

... Changes to Table 1 ............................................................................3 Updated Outline Dimensions........................................................42 Changes to Ordering Guide...........................................................43 6/05—Rev Rev. B Updated Format.................................................................. Universal Changed Range of Absolute Voltage on Analog Inputs Universal Changes to Table 19 ........................................................................21 Updated Outline Dimensions........................................................42 Changes to Ordering Guide...........................................................43 11/98—Rev Rev. A Revision 0: Initial Version Rev Page AD7705/AD7706 ...

Page 4

... AD7705/AD7706 PRODUCT HIGHLIGHTS 1. The AD7705/AD7706 devices consume less than supplies and 1 MHz master clock, making them ideal for use in low power systems. Standby current is less than 8 μA. 2. The programmable gain input allows the AD7705/AD7706 to accept input signals directly from a strain gage or transducer, removing a considerable amount of signal conditioning ...

Page 5

... REF ±V /gain nom REF Rev Page AD7705/AD7706 Conditions/Comments Guaranteed by design, filter notch < Depends on filter cutoffs and selected gain Filter notch < 60 Hz, typically ±0.0003% For gains 1, 2, and 4 For gains 8, 16, 32, 64, and 128 Typically ±0.001% ...

Page 6

... AD7705/AD7706 Parameter AIN Input Sampling Rate Reference Input Range REF IN(+) − REF IN(−) Voltage REF IN(+) − REF IN(−) Voltage REF IN Input Sampling Rate LOGIC INPUTS Input Current All Inputs, Except MCLK IN MCLK IN All Inputs, Except SCLK and MCLK IN Input Low Voltage, V ...

Page 7

... The AD7705/AD7706 can tolerate absolute analog input voltages down to GND − 200 mV, but the leakage current increases. 11 The analog input voltage range on AIN(+) is given with respect to the voltage on AIN(−) on the AD7705, and with respect to the voltage of the COMMON input on the AD7706. The absolute voltage on the analog inputs should not be more positive than V Input voltages of GND − ...

Page 8

... See Figure 19 and Figure 20. 3 The f duty cycle range is 45% to 55%. f must be supplied whenever the AD7705/AD7706 are not in standby mode clock is present, the devices can draw CLKIN CLKIN higher current than specified, and possibly become uncalibrated. 4 The AD7705/AD7706 are production tested with f ...

Page 9

... DD −0 0.3 V device reliability. DD −40° 85°C −65° 150°C 150°C 450 mW 105°C/W 260°C 450 mW 75°C/W 215°C 220°C 450 mW 139°C/W 215°C 220°C >4000 V Rev Page AD7705/AD7706 ...

Page 10

... SCLK Serial Clock. An external serial clock is applied to the Schmitt-triggered logic input to access serial data from the AD7705/AD7706. This serial clock can be a continuous clock with all data transmitted in a continuous train of pulses. Alternatively, it can be a noncontinuous clock with the information transmitted to the AD7705/AD7706 in smaller batches of data. ...

Page 11

... Serial Data Input. Serial data is written to the input shift register on the part. Data from the input shift register is transferred to the setup register, clock register, or communication register, depending on the register selection bits of the communication register Supply Voltage. 2 5.25 V operation GND GND Ground Reference Point for the AD7705/AD7706 Internal Circuitry. Rev Page AD7705/AD7706 ...

Page 12

... AD7705/AD7706 OUTPUT NOISE (5 V OPERATION) Table 5 shows the AD7705/AD7706 output rms noise for the selectable notch and −3 dB frequencies for the parts, as selected by FS0 and FS1 of the clock register. The numbers given are for the bipolar input ranges with 2.5 V and V ...

Page 13

... OUTPUT NOISE (3 V OPERATION) Table 7 shows the AD7705/AD7706 output rms noise for the selectable notch and −3 dB frequencies for the parts, as selected by FS0 and FS1 of the clock register. The numbers given are for the bipolar input ranges with 1.225 V and a V ...

Page 14

... AD7705/AD7706 TYPICAL PERFORMANCE CHARACTERISTICS 32771 25° 2.5V RMS NOISE = 600nV REF 32770 GAIN = +128 50Hz UPDATE RATE 32769 32768 32767 32766 32765 32764 32763 0 100 200 300 400 500 600 READING NUMBER Figure 5. Noise @ Gain = +128 With 50 Hz Update Rate 1 ...

Page 15

... OSCILLATOR = 4.9152MHz 2 OSCILLATOR = 2.4576MHz CH1 5.00V CH2 2.00V Figure 11. Crystal Oscillator Power-Up Time 5ms/DIV –40 –30 –20 –10 Figure 12. Standby Current vs. Temperature Rev Page AD7705/AD7706 MCLK TEMPERATURE ( ° C) ...

Page 16

... AD7705) and Table 13 (for the AD7706) show which channel combinations have independent calibration coefficients. With CH1 at Logic 1 and CH0 at Logic 0, the AD7705 looks at the AIN1(−) input internally shorted to itself, while the AD7706 looks at the COMMON input internally shorted to itself. This can be used as a test method to evaluate the noise performance of the parts with no external noise sources. In this mode, the AIN1(− ...

Page 17

... RS0 Table 12. Channel Selection for AD7705 CH1 CH0 AIN(+) 0 0 AIN1(+) 0 1 AIN2(+) 1 0 AIN1(− AIN1(−) Table 13. Channel Selection for AD7706 CH1 CH0 AIN 0 0 AIN1 0 1 ...

Page 18

... AD7705/AD7706 Table 16. Operating Mode Options MD1 MD0 Operating Mode 0 0 Normal Mode. In this mode, the device performs normal conversions Self-Calibration. This activates self-calibration on the channel selected by CH1 and CH0 of the communication register. This is a one-step calibration sequence. When the sequence is complete, the part returns to normal mode, with both MD1 and MD0 returning to 0 ...

Page 19

... Register Description ZERO Zero. A zero must be written to these bits to ensure correct operation of the AD7705/AD7706. Failure might result in unspecified operation of the device. CLKDIS Master Clock Disable Bit. Logic 1 in this bit disables the master clock, preventing it from appearing at the MCLK OUT pin. When disabled, the MCLK OUT pin is forced low ...

Page 20

... However, the 16 bits of data written to the part will be ignored by the AD7705/AD7706. TEST REGISTER (RS2, RS1, RS0 = 1, 0, 0); POWER-ON/RESET STATUS: 00 HEXADECIMAL The part contains a test register that is used when testing the device ...

Page 21

... Hz to 52.4 Hz. The AD7705 basic connection diagram is shown in Figure 13. It shows the AD7705 driven from an analog 5 V supply. An AD780 or REF192 precision 2.5 V reference provides the reference source for the part. On the digital side, the part is configured for 3-wire operation with CS tied to GND ...

Page 22

... The input channels are fully differential result, on the AD7705, the voltage to which the unipolar and bipolar signals on the AIN(+) input are referenced is the voltage on the respective AIN(− ...

Page 23

... V of 2.5 V, the input voltage REF range on the AIN1(+) input AIN1(−) is 2.5 V and AD7705 is configured for bipolar mode with a gain of 2 and 2.5 V, the analog input range on REF the AIN1(+) input is 1. 3.75 V (i.e., 2.5 V ± 1.25 V). If AIN1(− ...

Page 24

... AD7705/AD7706. For example, if the required bandwidth is 7.86 Hz, but the required update rate is 100 Hz, data can be taken from the AD7705/AD7706 at the 100 Hz rate, giving a −3 dB bandwidth of 26.2 Hz. Postfiltering can then be applied to reduce the bandwidth and output noise to the 7.86 Hz bandwidth level while maintaining an output rate of 100 Hz ...

Page 25

... AIN(+) = AIN(−) = internal bias voltage on the AD7705, and AIN = COMMON = internal bias voltage on the AD7706). The PGA is set for the selected gain for this zero-scale calibration conversion, as per the G1 and G0 bits in the communication register ...

Page 26

... In unipolar mode, there is considerable flexibility in handling negative offsets with respect to AIN(−) on the AD7705, and with respect to COMMON on the AD7706. In both unipolar and bipolar modes, the range of positive offsets that can be handled by the part depends on the selected span ...

Page 27

... SCALE POINT calibration registers. However, to ensure correct calibration for the devices, a calibration routine should be performed after power-up. The power dissipation and temperature drift of the AD7705/ AD7706 are low, and no warm-up time is required before the initial calibration is performed. However external reference is used, it must be stabilized before calibration is initiated ...

Page 28

... Another factor that influences the current is the effective series resistance (ESR) of the crystal that appears between the MCLK IN and MCLK OUT pins of the AD7705/ AD7706 general rule, the lower the ESR value, the lower the current taken by the oscillator circuit. ...

Page 29

... DRDY line does not return low until the settling time of the filter has elapsed. RESET INPUT The RESET input on the AD7705/AD7706 resets the logic, digital filter, analog modulator, and on-chip registers to their default states. DRDY is driven high, and the AD7705/AD7706 ignore all communication to their registers while the RESET input is low ...

Page 30

... I changes as the supply voltage varies over this range. There internal current boost bit on the AD7705/AD7706 that is set internally in accordance with the operating conditions. This affects the current drawn by the analog circuitry within these devices. Minimum power consumption is achieved when the ...

Page 31

... The serial interface can be reset by exercising the RESET input. It can also be reset by writing a series the DIN input. If Logic 1 is written to the AD7705/AD7706 DIN line for at least 32 serial clock cycles, the serial interface is reset. This ensures that in 3-wire systems, if the interface is lost via either a software error or a glitch in the system, it can be reset to a known state ...

Page 32

... AD7705/AD7706 DRDY SCLK t 5 DOUT SCLK t 12 DIN MSB Figure 19. Read Cycle Timing Diagram MSB Figure 20. Write Cycle Timing Diagram Rev Page LSB t 16 LSB ...

Page 33

... REGISTER (08 HEX) YES READ FROM COMMUNICATIONS REGISTER POLL DRDY BIT OF COMMUNICATIONS REGISTER WRITE TO COMMUNICATIONS REGISTER SETTING UP NEXT OPERATION READ FROM THE DATA REGISTER (38 HEX) Figure 21. Flowchart for Setting Up and Reading from the AD7705 Rev Page AD7705/AD7706 NO DRDY LOW? YES ...

Page 34

... SCLK is active. Coding for an interface between the 68HC11 and the AD7705/ AD7706 is given in the C Code for Interfacing AD7705 to 68HC11 section. In this example, the DRDY output line of the AD7705 is connected to the PC0 port bit of the 68HC11 and is polled to determine its status. 8XC51 P3.0 P3 ...

Page 35

... DRDY output is connected to the INT1 input of the 8XC51. For interfaces that require control of the CS input on the AD7705/AD7706, a port bit of the 8XC51 (such as P1.1) that is configured as an output can be used to drive the CS input. The 8XC51 is configured in Mode 0 serial interface mode ...

Page 36

... AD7705/AD7706 C Code for Interfacing AD7705 to 68HC11 #include <math.h> #include <io6811.h> #define NUM_SAMPLES 1000 /* change the number of data samples */ #define MAX_REG_LENGTH 2 /* this says that the max length of a register is 2 bytes */ Writetoreg (int); Read (int,char); char *datapointer = store; char store[NUM_SAMPLES*MAX_REG_LENGTH + 30]; void main() ...

Page 37

... PORTC & 0xfb ; /* /CS is low */ for(b=0;b<reglength;b++) { SPDR = 0; while(!(SPSR & 0x80)); /* wait until port ready before reading */ *datapointer++=SPDR; /* read SPDR into store array via datapointer */ } PORTC|=4; /* /CS is high */ } Rev Page AD7705/AD7706 ...

Page 38

... ADCs, but without the disadvantage of needing to supply a high quality integrating capacitor. In addition, using the AD7705 in a system allows the designer to achieve a much higher level of resolution, because noise performance of the AD7705 is better than that of the integrating ADCs. ...

Page 39

... AD7705 is very low. The lead resistances present a small source impedance; therefore not generally necessary to use the buffer of the AD7705. If the buffer is required, the common- mode voltage should be set accordingly by inserting a small resistance between the bottom end of the RTD and the GND of the AD7705. In the application shown, an external 400 μ ...

Page 40

... GND ISOLATED GROUND mean that the current available to power the transmitter can be as low as 3.5 mA. The AD7705 consumes only 320 μA, leaving at least 3 mA available for the rest of the transmitter. The AD7705, with its dual-input channel, is ideally suited for systems requiring an auxiliary channel whose measured variable is used to correct that of the primary channel ...

Page 41

... GND to V the absolute value of the analog input voltage lies between GND − 100 mV and V GND − 200 mV can be accommodated on the AD7705 at 25°C without any degradation in performance, but with significantly increased leakage at elevated temperatures. ON/OFF SWITCH ...

Page 42

... AD7705/AD7706 OUTLINE DIMENSIONS 10.50 (0.4134) 10.10 (0.3976 7.60 (0.2992) 7.40 (0.2913) 10.65 (0.4193 10.00 (0.3937) 1.27 (0.0500) 2.65 (0.1043) BSC 2.35 (0.0925) 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) SEATING COPLANARITY PLANE 0.10 0.31 (0.0122) COMPLIANT TO JEDEC STANDARDS MS-013-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. ...

Page 43

... AD7705BRZ-REEL7 1 −40°C to +85°C AD7705BRU −40°C to +85°C AD7705BRU-REEL −40°C to +85°C AD7705BRU-REEL7 −40°C to +85°C 1 AD7705BRUZ −40°C to +85°C 1 AD7705BRUZ-REEL −40°C to +85°C 1 AD7705BRUZ-REEL7 −40°C to +85°C AD7706BN −40°C to +85°C 1 AD7706BNZ − ...

Page 44

... AD7705/AD7706 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01166-0-5/06(C) Rev Page ...

Related keywords