AD7856 Analog Devices, AD7856 Datasheet
AD7856
Specifications of AD7856
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AD7856 Summary of contents
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... Instrumentation and Control Systems High Speed Modems GENERAL DESCRIPTION The AD7856 is a high speed, low power, 14-bit ADC that oper- ates from a single 5 V power supply. The ADC powers up with a set of default conditions at which time it can be operated as a read only ADC. The ADC contains self-calibration and system ...
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... AD7856–SPECIFICATIONS = 4.096 V External Reference unless otherwise noted, SLEEP = Logic High; T REF /REF IN OUT tions apply for Mode 2 operation, standard 3-wire SPI interface; refer to Detailed Timing section for Mode 1 Specifications. Parameter DYNAMIC PERFORMANCE 3 Signal to Noise + Distortion Ratio (SNR) Total Harmonic Distortion (THD) ...
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... The Offset and Gain Calibration Spans are defined as the range of offset and gain errors that the AD7856 can calibrate. Note also that these are voltage spans and are not absolute voltages (i.e., the allowable system offset voltage presented at AIN(+) for the system offset error to be adjusted out will be AIN(–) the allowable system full-scale voltage applied between AIN(+) and AIN(– ...
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... AD7856 1 TIMING SPECIFICATIONS Limit MIN MAX Parameter A Version K Version 2 f 500 500 CLKIN SCLK 3 t 100 100 3.5 5.25 CONVERT t –0.4 t –0 SCLK 0.4 t 0.4 t SCLK ...
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... MAX, 5.25 s MAX FOR K VERSION CONVERT 100ns MIN, = 30/50ns MAX A/ CONVERT THREE-STATE DB15 DB15 DB11 –5– AD7856 I 1.6mA OL TO OUTPUT +2.1V PIN C L 100pF I 200 30/40ns MIN A THREE- ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7856 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... When this input is not used, it should be tied to DV Busy Output. The busy output is triggered high by the falling edge of CONVST or rising edge of CAL, 2 BUSY and remains high until conversion is completed. BUSY is also used to indicate when the AD7856 has completed its on-chip calibration sequence. SLEEP 3 Sleep Input/Low Power Mode ...
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... AIN(+) refers to the positive input of the pseudo-differential pair, and AIN(–) refers to the negative analog input of the pseudo-differential pair or to AGND depending on the channel configuration. Total Harmonic Distortion Total Harmonic Distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7856 defined as THD (dB) 20 log ...
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... Addressing the On-Chip Registers Writing A write operation to the AD7856 consists of 16 bits. The two MSBs, ADDR0 and ADDR1, are decoded to determine which register is addressed, and the subsequent 14 bits of data are written to the addressed register not until all 16 bits are written that the data is latched into the addressed registers ...
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... AD7856 CONTROL REGISTER The arrangement of the Control Register is shown below. The control register is a write only register and contains 14 bits of data. The control register is selected by putting two 1s in ADDR1 and ADDR0. The function of the bits in the control register are de- scribed below. The power-up status of all bits is 0. ...
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... AD7856 sample and hold circuit. AIN(–) refers to the negative input seen by the AD7856 sample and hold circuit. CALMD CALSLT1 CALSLT0 ...
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... AD7856 STATUS REGISTER The arrangement of the Status Register is shown below. The status register is a read only register and contains 16 bits of data. The status register is selected by first writing to the control register and putting two 1s in RDSLT1 and RDSLT0. The function of the bits in the status register are described below. The power-up status of all bits is 0. ...
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... CALIBRATION REGISTERS The AD7856 has ten calibration registers in all, eight for the DAC, one for the offset and one for gain. Data can be written to or read from all ten calibration registers. In self- and system calibration the part automatically modifies the calibration regis- ters ...
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... AD7856 START WRITE TO CONTROL REGISTER SETTING STCAL = 0, RDSLT1 = 1, RDSLT0 = 0, AND CALSLT1, CALSLT0 = 00, 01, 10, 11 CAL REGISTER POINTER IS AUTOMATICALLY RESET READ CAL REGISTER CAL REGISTER POINTER IS AUTOMATICALLY INCREMENTED LAST REGISTER READ OPERATION OR ABORT ? YES FINISHED Figure 9. Flowchart for Reading from the Calibration ...
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... Signal to (Noise + Distor- DD tion) by only 0.5 dBs. The AD7856 can operate at throughput rates up to 285 kHz. For the AD7856 a conversion takes 21 CLKIN periods; two CLKIN periods are needed for the acqui- sition time, giving a full cycle time of 3. 260 kHz, CLKIN = 6 MHz) ...
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... TO V Input Range The analog input range for the AD7856 AIN(–) pin on the AD7856 can be biased up above AGND, if required. The advantage of biasing the lower end of the analog input range away from AGND is that the user does not need to have the analog input swing all the way down to AGND ...
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... AIN(–) Figure 14 Input Configuration REF Transfer Function For the AD7856 input range the designed code transitions occur midway between successive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs . . . FS – 3/2 LSBs). The output coding is straight binary, with 1 LSB = FS/16384 = 4.096 V/16384 = 0.25 mV when ...
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... Initiating conversions in software is not recommended for Mode 1 operation. Figure 18 shows a typical FFT plot for the AD7856 at 190 kHz sample rate and 10 kHz input frequency. 4096 POINT FFT –15 ...
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... POWER-UP REV. A POWER-UP TIMES Using an External Reference When the AD7856 is powered up, the part is powered up from one of two conditions. First, when the power supplies are ini- tially powered up and, secondly, when the part is powered up from either a hardware or software power-down (see last section). ...
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... When using this mode of operation the AD7856 is only powered up for the duration of the conver- sion. If the power-up time of the AD7856 is taken and it is assumed that the current during power typ, then power consumption as a function of throughput can easily be calculated ...
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... STCAL bit to one. The timing diagrams that follow involve using the CAL pin. The duration of each of the different types of calibrations is given in Table VIII for the AD7856 with a 6 MHz master clock. These calibration times are master clock dependent. Table VIII. Calibration Times (AD7856 with 6 MHz CLKIN) ...
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... BUSY (O/P) Figure 25. Timing Diagram for Full-Self Calibration System Calibration Description System calibration allows the user to take out system errors external to the AD7856 as well as calibrate the errors of the AD7856 itself. The maximum calibration range specified for the system offset errors is 3.75 REF for the system gain errors is 1 ...
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... CAL2 t 16 Table X summarizes the interface modes provided by the AD7856. It also outlines the various which the par- ticular interface is suited. V OFFSET Interface Mode 1 may only be set by programming the control register (See section on Control Register). Some of the more popular Processors, Controllers, and DSP machines that the AD7856 will interface to directly are men- tioned here ...
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... CONVST pin. Figures 31 and 32 show the timing diagrams for Operating Mode 1 in Table X where the AD7856 is in the 2-wire interface mode. Here the DIN pin is used for both input and output as shown. The SYNC input is level-triggered active low and can be pulsed (Figure 31) or can be constantly low (Figure 32) ...
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... DB15 DB14 DB13 DB12 DB11 DB15 DB14 DB13 DB12 DB11 –25– AD7856 , after the SYNC goes high. With MIN/MAX (CONTINUOUS SCLK), SCLK = 20ns MIN, ns MIN/MAX (CONTINUOUS SCLK) SCLK THREE- STATE DB10 DB0 ...
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... To enable Serial Inter- face Mode 1 the user must also write to the part. Figures 34 and 35 outline flowcharts of how to configure the AD7856 Serial Interface Modes 1 and 2 respectively. The continuous loops on all diagrams indicate the sequence for more than one conversion. ...
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... APPLY SYNC (IF REQUIRED), SCLK, WRITE TO CONTROL REGISTER SETTING NEXT CHANNEL, CONVST BIT TO 1, READ PREVIOUS CONVERSION RESULT ON NO DOUT PIN (NOTE 1) CHANNEL, CONVST BIT TO 1, READ RESULT ON DOUT PIN FOR CONVERSION JUST COMPLETED WAIT FOR BUSY SIGNAL TO GO LOW OR WAIT FOR BUSY BIT = 0 AD7856 ...
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... For the 8XC51 12 MHz version the serial clock will run at a maxi- mum of 1 MHz so the serial interface of the AD7856 will only be running at 1 MHz. The CLKIN signal must be provided separately to the AD7856 from a port line on the 8XC51 or from a source other than the 8XC51 ...
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... AD7856 to DSP56000/1/2/L002 Interface AD7856 Figure 40 shows the AD7856 to DSP56000/1/2/L002 interface. CONVST Here the DSP5600x is the master and the AD7856 is the slave. The AD7856 is in Interface Mode 2. The setting of the bits in CLKIN the registers of the DSP5600x would be for synchronous opera- SYNC SLAVE ...
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... The analog ground plane should be allowed to run under the AD7856 to avoid noise coupling. The power supply lines to the AD7856 should use as large a trace as pos- sible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals like ...
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... SERIAL INTERFACE SUMMARY . . . . . . . . . . . . . . . . . . 23 Resetting the Serial Interface . . . . . . . . . . . . . . . . . . . . . . 23 DETAILED TIMING SECTION Mode 1 (2-Wire 8051 Interface Mode 2 (3-Wire SPI/QSPI Interface Mode CONFIGURING THE AD7856 . . . . . . . . . . . . . . . . . . . . . 26 Writing to the AD7856 . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Interface Mode 1 Configuration . . . . . . . . . . . . . . . . . . . . 26 Interface Mode 2 Configuration . . . . . . . . . . . . . . . . . . . . 27 MICROPROCESSOR INTERFACING . . . . . . . . . . . . . . . 28 AD7856–8XC51 Interface . . . . . . . . . . . . . . . . . . . . . . . . 28 AD7856–68HC11/16/L11/PIC16C42 Interface . . . . . . . . 28 AD7856–ADSP-21xx Interface . . . . . . . . . . . . . . . . . . . . . 29 AD7856– ...
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... AD7856 0.210 (5.33) MAX 0.200 (5.05) 0.125 (3.18) 0.0118 (0.30) 0.0040 (0.10) 0.078 (1.98) 0.068 (1.73) 0.008 (0.203) 0.002 (0.050) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 24-Lead Plastic DIP (N-24) 1.275 (32.30) 1.125 (28.60 0.280 (7.11) 0.240 (6.10) 0.325 (8.25 0.300 (7.62) PIN 1 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN 0.022 (0.558) 0.100 (2.54) 0.070 (1.77) SEATING BSC PLANE 0 ...