AD7819 Analog Devices, AD7819 Datasheet - Page 9

• Manufacturer Part Number: AD7819
• Description: +2.7 V to +5.5 V, 200 kSPS 8-Bit Sampling ADC
• Manufacturer: Analog Devices

Specifications of AD7819

• Resolution (bits): 8bit
• # Chan: 1
• Sample Rate: 200kSPS
• Interface: Par
• Analog Input Type: SE-Uni
• Ain Range: Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC,SOP

PARALLEL INTERFACE
The parallel interface of the AD7819 is eight bits wide. The out-
put data buffers are activated when both CS and RD are logic
low. At this point the contents of the data register are placed on
the 8-bit data bus. Figure 15 shows the timing diagram for the par-
allel port. The Parallel Interface of the AD7819 is reset when
EXT CONVST
EXT CONVST
INT CONVST
INT CONVST
DB7–DB0
CONVST
DB7–DB0
DB7–DB0
BUSY
CS/RD
CS/RD
BUSY
BUSY
CS
RD
t
POWER-UP
t
3
t
POWER-UP
t
t
2
1
t
t
3
t
2
3
t
4
t
6
t
t
1
1
8 MSBs
8 MSBs
8 MSBs
t
7
BUSY goes logic high. Care must be taken to ensure that a read
operation does not occur while BUSY is high. Data read from
the AD7819 while BUSY is high will be invalid. For optimum
performance the read operation should end at least 100 ns (t
prior to the falling edge of the next CONVST.
t
5
t
8
AD7819
8
)