AD5790 Analog Devices, AD5790 Datasheet - Page 9

• Manufacturer Part Number: AD5790
• Manufacturer: Analog Devices

Specifications of AD5790

• Resolution (bits): 20bit
• Max Pos Supply (v): +16.5V
• Single-supply: No
• Dac Type: Voltage Out
• Dac Input Format: Ser

Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
Pin No.
1
2
3, 5
4
6
7
8
9
10, 21, 22, 23
11
12
13
14
15
16
17, 18
19
20
24
EPAD
Mnemonic
SDO
DGND
AGND
INV
V
V
V
RESET
CLR
LDAC
V
IOV
DNC
SDIN
SCLK
SYNC
V
V
R
V
FB
OUT
REFP
DD
CC
REFN
SS
SS
CC
Description
Analog Output Voltage.
Positive Reference Voltage Input. A voltage in the range of 5 V to V
Positive Analog Supply Connection. A voltage in the range of 7.5 V to 16.5 V can be connected. V
decoupled to AGND.
Active Low Reset. Asserting this pin returns the
Active Low Input. Asserting this pin sets the DAC register to a user defined value (see
DAC output. The output value depends on the DAC register coding that is being used, either binary or twos
complement.
Active Low Load DAC Logic Input. This is used to update the DAC register and, consequently, the analog output.
When tied permanently low, the output is updated on the rising edge of SYNC. If LDAC is held high during the
write cycle, the input register is updated, but the output update is held off until the falling edge of LDAC. The
LDAC pin should not be left unconnected.
Digital Supply. Voltage range is from 2.7 V to 5.5 V. V
Digital Interface Supply. Digital threshold levels are referenced to the voltage applied to this pin. Voltage range is
from 1.71 V to 5.5 V
Do Not Connect. Do not connect to these pins.
Serial Data Output.
Serial Data Input. This device has a 24-bit input shift register. Data is clocked into the register on the falling edge
of the serial clock input.
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data
can be transferred at rates of up to 35 MHz.
Level-Triggered Control Input (Active Low). This is the frame synchronization signal for the input data. When
SYNC goes low, it enables the input shift register, and data is then transferred in on the falling edges of the
following clocks. The DAC is updated on the rising edge of SYNC.
Ground Reference Pin for Digital Circuitry.
Negative Reference Voltage Input.
Negative Analog Supply Connection. A voltage in the range of −16.5 V to −2.5 V can be connected. V
decoupled to AGND.
Ground Reference Pin for Analog Circuitry.
Feedback Connection for External Amplifier. See the
Inverting Input Connection for External Amplifier. See the
Negative Analog Supply Connection (V
be decoupled to AGND. The paddle can be left electrically unconnected provided that a supply connection is
made at the V
thermal performance.
SS
pins. It is recommended that the paddle be thermally connected to a copper plane for enhanced
RESET
V
LDAC
V
REFP
CLR
V
V
OUT
DD
DD
Figure 5. Pin Configuration
Rev. B | Page 9 of 28
(Not to Scale)
AD5790
TOP VIEW
SS
). A voltage in the range of −16.5 V to −2.5 V can be connected. V
AD5790
V
AGND
V
V
DGND
SYNC
SCLK
SS
SS
REFN
CC
AD5790
should be decoupled to DGND.
to its power-on status.
AD5790
Features
DD
Features
− 2.5 V can be connected.
section for further details.
section for further details.
Table 12
) and updates the
DD
must be
AD5790
SS
must be
SS
must