AD5422 Analog Devices, AD5422 Datasheet

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AD5422

Manufacturer Part Number
AD5422
Description
Single Channel, 16-Bit, Serial Input, Current Source & Voltage Output DAC
Manufacturer
Analog Devices
Datasheet

Specifications of AD5422

Resolution (bits)
16bit
Dac Update Rate
40kSPS
Dac Settling Time
18µs
Max Pos Supply (v)
+40V
Single-supply
No
Dac Type
I or V Out
Dac Input Format
SPI

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FEATURES
12-/16-bit resolution and monotonicity
Current output ranges: 4 mA to 20 mA, 0 mA to 20 mA,
Voltage output ranges: 0 V to 5 V, 0 V to 10 V, ±5 V, ±10 V
Flexible serial digital interface
On-chip output fault detection
On-chip reference: 10 ppm/°C maximum
Asynchronous clear function
Power supply range
Output loop compliance: AV
Temperature range: −40°C to +85°C
TSSOP and LFCSP packages
APPLICATIONS
Process control
Actuator control
PLC
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
0 mA to 24 mA
10% overrange
±0.01 % FSR typical total unadjusted error (TUE)
±2 ppm/°C output drift
AV
AV
±0.01 % FSR typical total unadjusted error (TUE)
±3 ppm/°C output drift
DD
SS
: −26.4 V to −3 V/0 V
: 10.8 V to 40 V
DD
– 2.5 V
Current Source and Voltage Output DACs
Single Channel, 12-/16-Bit, Serial Input,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The AD5412/AD5422 are low-cost, precision, fully integrated
12-/16-bit digital-to-analog converters (DAC) offering a pro-
grammable current source and programmable voltage output
designed to meet the requirements of industrial process control
applications.
The output current range is programmable at 4 mA to 20 mA,
0 mA to 20 mA, or an overrange function of 0 mA to 24 mA.
Voltage output is provided from a separate pin that can be
configured to provide 0 V to 5 V, 0 V to 10 V, ±5 V, or ±10 V
output ranges; an overrange of 10% is available on all ranges.
Analog outputs are short and open-circuit protected and can
drive capacitive loads of 1 μF.
The device operates with an AV
10.8 V to 40 V. Output loop compliance is 0 V to AV
The flexible serial interface is SPI- and MICROWIRE™-
compatible and can be operated in 3-wire mode to minimize
the digital isolation required in isolated applications.
The device also includes a power-on-reset function, ensuring
that the device powers up in a known state. The part also
includes an asynchronous clear pin (CLEAR) that sets the
outputs to zero-scale/midscale voltage output or the low
end of the selected current range.
The total output error is typically ±0.01% in current mode and
±0.01% in voltage mode.
Table 1. Pin-Compatible Devices
Part Number
AD5410
AD5420
©2009-2011 Analog Devices, Inc. All rights reserved.
AD5412/AD5422
DD
Description
Single channel, 12-bit, serial
input current source DAC
Single channel, 16-bit, serial
input current source DAC
power supply range from
www.analog.com
DD
− 2.5 V.

Related parts for AD5422

AD5422 Summary of contents

Page 1

... Single Channel, 12-/16-Bit, Serial Input, Current Source and Voltage Output DACs GENERAL DESCRIPTION The AD5412/AD5422 are low-cost, precision, fully integrated 12-/16-bit digital-to-analog converters (DAC) offering a pro- grammable current source and programmable voltage output designed to meet the requirements of industrial process control applications ...

Page 2

... Changes to Pin Configurations and Function Descriptions Section, Added Figure 6, Renumbered Subsequent Figures ..... 11 Changes to Theory of Operation Section.................................... 26 Changes to Architecture Section .................................................. 26 Changes to AD5412/AD5422 Features Section ......................... 31 Added IOUT Filtering Capacitors (LFCSP Package)Section, Including Figure 69 to Figure 72 and Table 24 ........................... 33 Changes to Thermal and Supply Considerations Section ......... 36 Updated Outline Dimensions ...

Page 3

... SELECT AD5412/AD5422 CLEAR LATCH INPUT SHIFT 12/16 SCLK 12-/16-BIT REGISTER DAC AND CONTROL SDIN LOGIC SDO POWER-ON VREF RESET REFOUT REFIN SET RANGE SCALING GND C COMP Figure 1. Rev Page AD5412/AD5422 R3 BOOST I OUT FAULT R SET +V SENSE V OUT –V SENSE ...

Page 4

... Rev Page unless otherwise noted. MAX Test Conditions/Comments Output unloaded AD5422 AD5412 T = 25° 25°C A AD5422 AD5412 Guaranteed monotonic Bipolar output range T = 25°C, bipolar output range A Bipolar output range T = 25°C A Unipolar output range T = 25°C, unipolar output range ...

Page 5

... FSR/°C Rev Page AD5412/AD5422 Test Conditions/Comments Output unloaded AD5422 AD5412 T = 25° 25°C A AD5422 AD5412 Guaranteed monotonic T = 25°C A AD5422 AD5422 25°C A AD5412 AD5412 25° 25°C A AD5422 AD5412 T = 25° 25°C A AD5422 AD5412 ...

Page 6

... AD5412/AD5422 Parameter 1 OUTPUT CHARACTERISTICS 3 Current Loop Compliance Voltage Output Current Drift vs. Time Resistive Load Inductive Load DC PSRR Output Impedance Output Current Leakage When Output Is Disabled REFERENCE INPUT/OUTPUT Reference Input 3 Reference Input Voltage DC Input Impedance Reference Output Output Voltage Reference Temperature Coefficient (TC Output Noise (0 ...

Page 7

... V, INL for the and ranges is measured beginning from Code 256 for the AD5422 and Code |AV | < 52.8 V, GND = 0 V, REFIN = +5 V external 350 Ω; all specifications LOAD MIN Min Typ ...

Page 8

... AD5412/AD5422 TIMING CHARACTERISTICS −26 −3 V kΩ 200 pF OUT LOAD L OUT Table 4. Parameter Limit MIN MAX WRITE MODE ...

Page 9

... Figure 3. Readback Mode Timing Diagram DB0 DB23 t INPUT WORD FOR DAC N – DB0 DB23 INPUT WORD FOR DAC N Figure 4. Daisy-Chain Mode Timing Diagram Rev Page AD5412/AD5422 DB0 DB15 DB0 ...

Page 10

... AD5412/AD5422 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. Transient currents not cause SCR latch-up. Table 5. Parameter Rating AV to GND −0 + GND +0 − −0 + GND −0 Digital Inputs to GND − ...

Page 11

... Data is valid on the rising edge of SCLK (see Figure 3 and Figure 4). Ground Reference Pin. An external, precision, low drift 15 kΩ current setting resistor can be connected to this pin to improve the I temperature drift performance. See the AD5412/AD5422 Features OUT section. Internal Reference Voltage Output. REFOUT = 5 V ± 2 mV. ...

Page 12

... Current Output Pin. Optional External Transistor Connection. Connecting an external transistor reduces the power dissipated in the AD5412/AD5422. See theAD5412/AD5422 Features section. Connection for Optional Output Filtering Capacitor. See the AD5412/AD5422 Features section. Buffered Analog Output Voltage. The output amplifier is capable of directly driving a 1 kΩ ...

Page 13

... AV (V) DD Figure 3.5 4.0 4 Rev Page AD5412/AD5422 25° –21 –19 –17 –15 –13 –11 –9 –7 –5 LOAD CURRENT (mA) Figure 10. DV Output Voltage vs. Load Current CC AV ...

Page 14

... AD5412/AD5422 1 CH1 20µV M2.00s Figure 13. REFOUT Output Noise (100 kHz Bandwidth) 5.003 50 DEVICES SHOWN AV = 24V DD 5.002 5.001 5.000 4.999 4.998 4.997 –40 – TEMPERATURE (°C) Figure 14. Reference Voltage vs. Temperature LINE 0V 5.0005 5.0000 4.9995 4.9990 4.9985 4.9980 4.9975 4.9970 4.9965 4.9960 4 ...

Page 15

... Figure 21. Total Unadjusted Error vs. DAC Code, Dual Supply 0.030 0.025 0.020 0.015 0.010 0.005 0 –0.005 –0.010 50,000 60,000 Figure 22. Total Unadjusted Error vs. DAC Code, Single Supply Rev Page AD5412/AD5422 AV = 24V +5V RANGE +10V RANGE 25° 10,000 ...

Page 16

... AD5412/AD5422 0.0015 AV = +24V –24V SS 0.0010 0.0005 0 –0.0005 –0.0010 +5V RANGE MAX INL ±5V RANGE MAX INL +5V RANGE MIN INL ±5V RANGE MIN INL –0.0015 –40 – TEMPERATURE (°C) Figure 23. Integral Nonlinearity Error vs. Temperature 1 +24V DD 0 –24V SS ALL RANGES ...

Page 17

... Figure 34. Source and Sink Capability of Output Amplifier Rev Page AD5412/AD5422 T = 25°C A ±10V RANGE /| 25°C A ±10V RANGE ...

Page 18

... AD5412/AD5422 0. +15V 0. –15V 25°C 0.03 A ±10V RANGE 0.02 0.01 0 –0.01 –0.02 –0.03 –0.04 –0.05 –20 –15 –10 –5 0 SOURCE/SINK CURRENT (mA) Figure 35. Source and Sink Capability of Output Amplifier, Zero-Scale Loaded +24V –24V SS 8 ±10V RANGE T = 25°C A OUTPUT UNLOADED 4 0 –4 – ...

Page 19

... Figure 40. Peak-to-Peak Noise (100 kHz Bandwidth +24V –24V SS = 25° +24V DD = –24V SS = 25°C LINE 0V Rev Page AD5412/AD5422 AV = +15V –15V 25° TIME (µs) Figure 41. V vs. Time on Power-Up OUT 20 ...

Page 20

... AD5412/AD5422 CURRENT OUTPUT EXTERNAL R 0.004 SET INTERNAL R SET EXTERNAL R , BOOST TRANSISTOR SET 0.002 INTERNAL R , BOOST TRANSISTOR SET 0 –0.002 –0.004 –0.006 AV = 24V –24V/0V –0.008 25° 250Ω R LOAD –0.010 0 10,000 20,000 30,000 40,000 CODE Figure 42. Integral Nonlinearity vs. Code 1 ...

Page 21

... A 0mA TO 24mA RANG 0.6 AV 0.4 0.2 0 –0.2 SET –0.4 SET SET –0.6 SET SET –0.8 SET –1 Figure 53. Differential Nonlinearity Error vs. AV Rev Page AD5412/AD5422 = 25° ( External 25°C A 0mA TO 24mA RANGE ...

Page 22

... AD5412/AD5422 1.0 0 25°C A 0.6 0mA TO 24mA RANGE 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1 (V) DD Figure 54. Differential Nonlinearity Error vs. AV 0.025 T = 25°C A 0.020 0mA TO 24mA RANGE 0.015 0.010 0.005 0 –0.005 –0.010 –0.015 (V) DD Figure 55 ...

Page 23

... TIME (µs) Figure 61. Digital to Analog Glitch – Rev Page AD5412/AD5422 T = 25° 24V 300Ω R LOAD TIME (µs) Figure 62 Output Current Step ...

Page 24

... Power-On Glitch Energy Power-on glitch energy is the impulse injected into the analog output when the AD5412/AD5422 is powered on specified as the area of the glitch in nV-sec. See Figure 41 and Figure 58. Digital-to-Analog Glitch Impulse Digital-to-analog glitch impulse is the impulse injected into the analog output when the input code in the DAC register changes state, but the output voltage remains constant ...

Page 25

... Load regulation is the change in reference output voltage due to a specified change in load current expressed in ppm/mA. 6 Rev Page AD5412/AD5422 is the maximum reference output measured over the is the minimum reference output measured over the total is the nominal reference output voltage ...

Page 26

... The desired output configuration is user selectable via the control register. ARCHITECTURE The DAC core architecture of the AD5412/AD5422 consists of two matched DAC sections. A simplified circuit diagram is shown in Figure 63. The four MSBs of the 12-/16-bit data-word are decoded to drive 15 switches E15 ...

Page 27

... AD5412/ th rising AD5422 devices in the chain. When the serial transfer to all devices is complete, LATCH is taken high. This latches the input data in each device in the daisy chain. The serial clock can be a continuous or a gated clock. ...

Page 28

... Readback Operation Readback mode is invoked by setting the address byte and read address when writing to the input register (see Table 9 and Table 11). The next write to the AD5412/AD5422 should be a NOP command, which clocks out the data from the previously addressed register as shown in Figure 3. ...

Page 29

... The data register is addressed by setting the address word of the input shift register to 0x01. The data to be written to the data register is entered in the D15 to D4 positions for the AD5412 and the D15 to D0 positions for the AD5422, as shown in Table 12 and Table 13. ...

Page 30

... Table 18. Reset Register Functions Option Description Reset Setting this bit performs a reset operation, restoring the AD5412/AD5422 to its power-on state. STATUS REGISTER The status register is a read-only register. The status register functionality is shown in Table 19 and Table 20. Table 19. Decoding the Status Register MSB ...

Page 31

... method of improving the stability of the SET output current over temperature, an external precision 15 kΩ low drift resistor can be connected to the R AD5412/AD5422 to be used instead of the internal resistor (R ). The external resistor is selected via the control register SET (see Table 14). ...

Page 32

... DIGITAL SLEW RATE CONTROL The slew rate control feature of the AD5412/AD5422 allows the user to control the rate at which the output voltage or current changes. With the slew rate control feature disabled, the output changes at a rate limited by the output drive circuitry and the attached load ...

Page 33

... Figure 72 100 110 , and CAP2 DD Figure 71. Slew Controlled Output Current Step Using C2 Figure 72. Smoothing Out the Steps Caused by the Digital Slew Rev Page AD5412/AD5422 C1 C2 CAP1 CAP2 4kΩ 40Ω DAC 12.5kΩ R1 Figure 70. I Filter Circuitry ...

Page 34

... AD5412/AD5422 Table 24. Programmable Slew Time Values in Seconds for a Full-Scale Change on Any Output Range Update Clock Frequency (Hz 257,730 0.25 0.13 198,410 0.33 0.17 152,440 0.43 0.21 131,580 0.50 0.25 115,740 0.57 0.28 69,440 0.9 0.47 37,590 1.7 0.87 25,770 2.5 1.3 20,160 3.3 1.6 16,030 4.1 2.0 10,290 6.4 3.2 8280 7.9 4.0 6900 9.5 4.8 5530 12 5.9 4240 15 7.7 3300 20 9.9 Step Size (LSB 0.06 0.03 0.016 0.08 0.04 0.021 0.11 0.05 0.027 0.12 0.06 0.031 ...

Page 35

... Design the printed circuit board (PCB) on which the AD5412/AD5422 is mounted so that the analog and digital sections are separated and confined to certain areas of the board. If the AD5412/AD5422 system R LOAD where multiple devices require an analog ground-to-digital ground connection, make the connection at one point only ...

Page 36

... The AD5412/AD5422 are designed to operate at a maximum junction temperature of 125° important that the devices not be operated under conditions that cause the junction temperature to exceed this value. Excessive junction tempera- ture can occur if the AD5412/AD5422 are operated from the maximum AV while driving the maximum current (24 mA) DD directly to ground ...

Page 37

... The internally generated digital power supply of the AD5412/ AD5422 powers the field side of the digital isolaters, removing the need to generate a digital power supply on the field side of the isolation barrier. The AD5412/AD5422 digital supply directly ...

Page 38

... AD5412/AD5422 OUTLINE DIMENSIONS 7.90 7.80 7. TOP VIEW 1.20 MAX 0.15 0.65 SEATING 0.05 BSC PLANE 0.10 COPLANARITY Figure 78. 24-Lead Thin Shrink Small Outline Package, Exposed Pad [TSSOP_EP] PIN 1 INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE 5.02 5.00 4.95 13 4.50 EXPOSED 4.40 PAD (Pins Up) 4.30 6.40 BSC 12 BOTTOM VIEW 1.05 1.00 8° 0.80 0° 0.20 0.30 0.09 0.19 COMPLIANT TO JEDEC STANDARDS MO-153-ADT (RE-24) Dimensions shown in millimeters 6 ...

Page 39

... AD5422AREZ-REEL 16 Bits 0.5% FSR max AD5422BREZ 16 Bits 0.3% FSR max AD5422BREZ-REEL 16 Bits 0.3% FSR max AD5422ACPZ-REEL 16 Bits 0.5% FSR max AD5422ACPZ-REEL7 16 Bits 0.5% FSR max AD5422BCPZ-REEL 16 Bits 0.3% FSR max AD5422BCPZ-REEL7 16 Bits 0.3% FSR max EVAL-AD5422EBZ RoHS Compliant Part. TUE V TUE Temperature Range OUT 0.3% FSR max −40°C to +85°C 0.3% FSR max − ...

Page 40

... AD5412/AD5422 NOTES ©2009-2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06996-0-11/11(D) Rev Page ...

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