AD5025 Analog Devices, AD5025 Datasheet - Page 5

• Manufacturer Part Number: AD5025
• Description: Fully Accurate 12-Bit VOUT DAC SPI Interface 2.7 V to 5.5 V in a TSSOP
• Manufacturer: Analog Devices

Specifications of AD5025

• Resolution (bits): 12bit
• Dac Update Rate: 1.5MSPS
• Dac Settling Time: 10.7µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

TIMING CHARACTERISTICS
All input signals are specified with t
Figure 4. V
Table 4.
Parameter
SCLK Cycle Time
SCLK High Time
SCLK Low Time
SYNC to SCLK Falling Edge Setup Time
Data Setup Time
Data Hold Time
SCLK Falling Edge to SYNC Rising Edge
Minimum SYNC High Time (Single Channel Update)
Minimum SYNC High Time (All Channel Update)
SYNC Rising Edge to SCLK Fall Ignore
LDAC Pulse Width Low
SCLK Falling Edge to LDAC Rising Edge
CLR Pulse Width Low
SCLK Falling Edge to LDAC Falling Edge
CLR Pulse Activation Time
SCLK Rising Edge to SDO Valid
SCLK Falling Edge to SYNC Rising Edge
SYNC Rising Edge to SCLK Rising Edge
SYNC Rising Edge to LDAC/CLR/PDL Falling Edge (Single Channel Update)
SYNC Rising Edge to LDAC/CLR/PDL Falling Edge (All Channel Update)
PDL Minimum Pulse Width
1
2
3
Circuit and Timing Diagrams
Maximum SCLK frequency is 50 MHz at V
Daisy-chain mode only.
Measured with the load circuit of Figure 2. t
DD
= 4.5 V to 5.5 V. All specifications T
DD
R
= 4.5 V to 5.5 V. Guaranteed by design and characterization; not production tested.
15
= t
determines the maximum SCLK frequency in daisy-chain mode.
F
Figure 2. Load Circuit for Digital Output (SDO) Timing Specifications
= 1 ns/V (10% to 90% of V
TO OUTPUT
MIN
PIN
to T
50pF
C
L
MAX
2mA
2mA
, unless otherwise noted.
Rev. 0 | Page 5 of 28
I
I
OL
OH
DD
) and timed from a voltage level of (V
V
OH
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
8
9
10
11
12
13
14
15
16
17
18
18
19
1
(MIN) + V
2, 3
2
2
2
2
2
OL
(MAX)
Min
20
10
10
16.5
5
5
0
2
4
17
20
20
10
10
10.6
5
8
2
4
20
AD5025/AD5045/AD5065
Typ
IL
+ V
IH
)/2. See Figure 3 and
Max
30
22
30
Unit
ns
ns
ns
ns
ns
ns
ns
μs
μs
ns
ns
ns
ns
ns
μs
ns
ns
ns
μs
μs
ns