AD5433 Analog Devices, AD5433 Datasheet
AD5433
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AD5433 Summary of contents
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... The applied external reference input voltage (V full-scale output current. An integrated feedback resistor (R provides temperature tracking and full-scale voltage output when combined with an external I-to-V precision amplifier. While these devices are upgrades of the AD5424/AD5433/ AD5445 latched interface and cannot be used in transparent mode. The ...
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... Added EPAD Note to Table 4 and EPAD Note to Figure 4......... 7 Added EPAD Note to Table 5 and EPAD Note to Figure 6......... 8 Added EPAD Note to Table 6 and EPAD Note to Figure 8......... 9 Deleted the Evaluation Board for AD5424/AD5433/AD5445 Section and Power Supplies for Evaluation Board Section ....... 23 Deleted Figure 59; Renumbered Sequentially ............................ 24 Deleted Figure 60 and Figure 61 ...
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... Rev Page AD5424/AD5433/AD5445 unless MIN MAX Test Conditions Guaranteed monotonic Guaranteed monotonic Guaranteed monotonic Data = 0×0000 25° OUT Data = 0×0000 −40°C to +125°C, I OUT Input resistance TC = –50 ppm/°C Input resistance TC = – ...
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... AD5424/AD5433/AD5445 Parameter Output Capacitance I 1 OUT I 2 OUT Digital Feedthrough Analog THD Digital THD 50 kHz f OUT 2 Output Noise Spectral Density SFDR Performance (Wide Band) Clock = 10 MHz 500 kHz f OUT 100 kHz f OUT 50 kHz f OUT Clock = 25 MHz 500 kHz f OUT 100 kHz f ...
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... DATA VALID Figure 2. Timing Diagram Rev Page AD5424/AD5433/AD5445 + unless otherwise noted. MIN MAX Unit Test Conditions/Comments R setup time ns min ns min R hold time CS low time (write cycle) ...
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... AD5424/AD5433/AD5445 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter V to GND GND REF GND OUT OUT Logic Inputs and Output 1 Operating Temperature Range Extended Industrial (Y Version) Storage Temperature Range Junction Temperature 16-Lead TSSOP θ ...
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... Positive Power Supply Input. These parts can be operated from a supply of 2 5.5 V. DAC Reference Voltage Input Terminal. DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external amplifier output. The exposed pad should be connected to ground. Rev Page AD5424/AD5433/AD5445 GND 1 15 R/W ...
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... The exposed pad should be connected to ground. Rev Page Data Sheet GND R PIN 1 INDICATOR DB9 DB8 AD5433 NC DB7 TOP VIEW DB6 5 11 DB0 NOTES CONNECT. 2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND. Figure 6. ...
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... Positive Power Supply Input. These parts can be operated from a supply of 2 5.5 V. DAC Reference Voltage Input Terminal. DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external amplifier output. The exposed pad should be connected to ground. Rev Page AD5424/AD5433/AD5445 GND 1 15 R/W ...
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... AD5424/AD5433/AD5445 TYPICAL PERFORMANCE CHARACTERISTICS 0. 25° 10V 0.15 REF 0.10 0.05 0 –0.05 –0.10 –0.15 –0. 100 150 CODE Figure 9. INL vs. Code (8-Bit DAC) 0 25° 10V REF 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 0 200 400 600 CODE Figure 10. INL vs. Code (10-Bit DAC) 1 ...
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... AD5445 0.5 0.4 0.3 0.2 0.1 –0.1 –0.2 –0.3 –0.4 –0.5 80 100 120 140 Figure 20. Gain and Offset Errors vs. V Rev Page AD5424/AD5433/AD5445 T MAX INL V V MAX DNL 0 MIN DNL MIN INL 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 V (V) BIAS Figure 18. Linearity vs. V Voltage Applied to I BIAS ...
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... AD5424/AD5433/AD5445 0.5 0.4 0.3 0.2 GAIN ERROR 0.1 0 –0.1 OFFSET ERROR –0.2 –0.3 –0.4 –0.5 0 0.2 0.4 0.6 0.8 1.0 1.2 V (V) BIAS Figure 21. Gain and Offset Errors vs. V BIAS 25°C A MAX INL REF MAX DNL 0 –1 –2 MIN INL MIN DNL –3 0.5 1.0 1.5 V (V) BIAS Figure 22. Linearity vs. V Voltage Applied to I ...
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... AD8038 AMPLIFIER –0.005 AD5445 DAC –0.010 1M 10M 100M –1.68 –1.69 –1.70 –1.71 –1.72 –1.73 –1.74 –1.75 –1.76 –1.77 1M 10M 100M Rev Page AD5424/AD5433/AD5445 25° AD5445 0 –3 – ±2V, AD8038 C 1.47pF REF ±2V, AD8038 C 1pF REF ...
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... AD5424/AD5433/AD5445 1 25°C A 1.6 1 1.2 1 0.8 0.6 0.4 0.2 0 2.5 3.0 3.5 4.0 VOLTAGE (V) Figure 33. Threshold Voltages vs. Supply Voltage 25° AMP = AD8038 –20 –40 –60 FULL SCALE –80 ZERO SCALE –100 –120 1 10 100 1k 10k FREQUENCY (Hz) Figure 34. Power Supply Rejection vs. Frequency – 25° ...
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... AD5445 65k CODES –30 –40 –50 –60 –70 –80 –90 –100 600 650 700 750 = 500 kHz, Clock = 25 MHz Figure 44. Narrow-Band IMD, f Rev Page AD5424/AD5433/AD5445 AMP = AD8038 AD5445 65k CODES 100 110 120 FREQUENCY (kHz) Figure 42 ...
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... AD5424/AD5433/AD5445 0 –10 –20 –30 –40 –50 –60 MCLK 10MHz – –80 –90 –100 FREQUENCY (kHz) Figure 45. Narrow-Band IMD kHz, 50 kHz, Clock = 10 MHz OUT 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 0 50 100 150 ...
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... Narrow-band SFDR is a measure of SFDR over an arbitrary window size, in this case, 50% of the fundamental. Digital SFDR is a measure of the usable dynamic range of the DAC when the signal is a digitally generated sine wave. Rev Page AD5424/AD5433/AD5445 OUT 1 terminal when all 0s are OUT ( ...
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... REF Rev Page 255 (8-bit AD5424 1023 (10-bit AD5433 4095 (12-bit AD5445) power pin is only used by the internal DD Analog Output (V) –V (255/256) REF –V (128/256) = –V REF ...
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... OUT REF REF where D is the fractional representation of the digital word loaded to the DAC and n is the resolution of the DAC 255 (8-bit AD5424 1023 (10-bit AD5433 4095 (12-bit AD5445) When signal, the circuit performs 4-quadrant IN multiplication. ...
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... V OUT configuration, the output voltage is given × × (V − V OUT FB DAC BIAS As D varies from 0 to 255 (AD5424 1023 (AD5433 4095 (AD5445), the output voltage varies from − V OUT BIAS OUT BIAS IN ...
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... FB where R is the DAC resistance at the V For a DAC leakage current kΩ, and a gain (that is, 1/D) of 16, the error voltage is 1.6 mV. Rev Page AD5424/AD5433/AD5445 . However, if the IN —an error of 3% even though the DAC itself has ...
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... AD9631 ±3 to ±6 320 REFERENCE SELECTION When selecting a reference for use with the AD5424/AD5433/ AD5445 family of current output DACs, pay attention to the reference’s output voltage temperature coefficient specification. This parameter not only affects the full-scale error, but can also affect the linearity (INL and DNL) performance ...
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... PINS OMITTED FOR CLARITY Figure 56. ADSP21xx-to-AD5424/AD5433/AD5445 8xC51-to-AD5424/AD5433/AD5445 Figure 57 shows the interface between the AD5424/AD5433/ AD5445 and the 8xC51 family of DSPs. To facilitate external data memory access, the address latch enable (ALE) mode is enabled. The low byte of the address is latched with this output ...
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... Table 12. Overview of AD54xx and AD55xx Devices Part No. Resolution No. DACs AD5424 8 1 AD5426 8 1 AD5428 8 2 AD5429 8 2 AD5450 8 1 AD5432 10 1 AD5433 10 1 AD5439 10 2 AD5440 10 2 AD5451 10 1 AD5443 12 1 AD5444 12 1 AD5415 12 2 AD5405 12 2 ...
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... Figure 59. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters 6.60 6.50 6. 4.50 4.40 4.30 6.40 BSC 1 10 PIN 1 0.65 BSC 1.20 MAX 0.15 0.20 0.05 0.09 0.30 0.19 SEATING 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AC Figure 60. 20-Lead Thin Shrink Small Outline Package [TSSOP] (RU-20) Dimensions shown in millimeters Rev Page AD5424/AD5433/AD5445 0.75 8° 0.60 0° 0.45 0.75 8° 0.60 0° 0.45 ...
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... SEATING PLANE ORDERING GUIDE 1 Model Resolution (Bits) AD5424YRU 8 AD5424YRU-REEL 8 AD5424YRU-REEL7 8 AD5424YRUZ 8 AD5424YRUZ-REEL 8 AD5424YRUZ-REEL7 8 AD5424YCPZ 8 AD5424YCPZ-REEL7 8 AD5433YRU 10 AD5433YRU-REEL 10 AD5433YRU-REEL7 10 AD5433YRUZ 10 AD5433YRUZ-REEL 10 AD5433YRUZ-REEL7 10 AD5433YCPZ 10 AD5445YRU 12 AD5445YRU-REEL 12 AD5445YRU-REEL7 12 AD5445YRUZ 12 AD5445YRUZ-REEL 12 AD5445YRUZ-REEL7 12 AD5445YCPZ 12 EVAL-AD5445EBZ RoHS Compliant Part. 0.60 MAX 4.00 BSC SQ 0.60 MAX 15 16 0.50 3.75 BSC BCS SQ (BOTTOM VIEW) ...
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... Data Sheet NOTES AD5424/AD5433/AD5445 Rev Page ...
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... AD5424/AD5433/AD5445 NOTES ©2005–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03160-0-12/11(C) Rev Page Data Sheet ...