AD7804 Analog Devices, AD7804 Datasheet - Page 20

• Manufacturer Part Number: AD7804
• Description: +3.3 V to +5 V Quad/Octal 10-Bit DAC
• Manufacturer: Analog Devices

Specifications of AD7804

• Resolution (bits): 10bit
• Dac Update Rate: 667kSPS
• Dac Settling Time: 1.5µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Ser

AD7804/AD7805/AD7808/AD7809
Grounding and Layout Techniques
To obtain optimum performance from the AD7804/AD7805/
AD7808/AD7809 care should be taken with the layout. Causes
for concern would be feedthrough from the interface bus onto
the analog circuitry particularly the reference pins and ground
loops. The board should be designed such that the analog and
digital sections are separated as much as possible. Ground plan-
ing and shielding should be used as much as possible. Digital
and analog ground planes should only be joined in one place to
avoid ground loops. The ideal place to join the ground planes is
at the analog and digital ground pins of the DAC. Alternatively
a star ground should be established on the board to which all
other grounds are returned. Good decoupling is important in
achieving optimum performance. All supplies, analog or digital,
should be decoupled with 10 F tantalum and 0.1 F ceramic
capacitors to their respective grounds, and should be as close as
possible to the pins of the device. The main aim of the bypass-
ing element is to maximize the charge stored in the bypass loop
while simultaneously minimizing the inductance of this loop.
Inductance in the loop acts as an impedance to high frequency
transients and results in power supply spiking. By keeping the
decoupling as close as possible to the device, the loop area is kept
to a minimum thus reducing the possibility of power supply spikes.
On the AD7805 the REFOUT pin of the device is located next
to the DB9 of the data bus, to reduce the risk of digital feed-
through and noise being coupled from the digital section onto
the reference, the REFOUT pin and any trace connected to it
1
32
V
BIAS
2
SUB DAC
RANGE
Figure 28. Pictorial View of Transfer Function for Any DAC Channel
32
V
BIAS
3
32
V
BIAS
CHANNEL RANGE MIN CODE LOADED TO SUB DAC
CHANNEL RANGE CENTER CODE LOADED TO SUB DAC
CHANNEL RANGE MAX CODE LOADED TO SUB DAC
31
32
MAIN DAC RANGE
V
BIAS
32
–20–
32
V
BIAS
33
should be shielded with analog ground. To reduce the noise on
this reference it should be decoupled with a 0.01 F capacitor to
analog ground, keeping the capacitor as close as possible to the
device. The comp pin which is the output from the internal
V
sensitive to noise pickup and feedthrough from the DAC output
and thus should be shielded with analog ground to keep this
reference point as quiet as possible. The comp pin should be
decoupled both to AV
capacitors. The external REFIN pin should also be shielded
with analog ground from the digital pins located next to it.
The same precautions should be taken with the reference pins
on the AD7804/AD7808 to reduce the risk of noise pickup and
feedthrough.
Reference Settling Time
With the REFOUT on the AD7804/AD7805/AD7808/AD7809
decoupled with a 0.01 F capacitor to AGND it takes the
REFOUT approximately 2 ms to fully settle after taking the
device out of power down. When this capacitor is reduced to
1 nF the settling time reduces to 150 s. The size of the capaci-
tor required on the REFOUT depends to a large extent on the
layout, if the REFOUT is well shielded with AGND the size of
the capacitor can be reduced thus reducing the settling time for
the reference. The internal V
comp pin when decoupled with a 1 nF capacitor to both AV
and AGND has very fast settling time, typically less than 500 ns.
32
DD
V
/2 reference is located next to V
BIAS
61
32
DD
V
BIAS
and AGND with 1–10 nF ceramic
62
32
DD
V
BIAS
/2 reference provided at the
63
32
OUT
V
BIAS
D on the DAC and is
REV. A
DD