AD7837 Analog Devices, AD7837 Datasheet

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AD7837

Manufacturer Part Number
AD7837
Description
LC2MOS Complete, Dual 12-Bit MDAC, (8 + 4) Loading Structure
Manufacturer
Analog Devices
Datasheet

Specifications of AD7837

Resolution (bits)
12bit
Dac Update Rate
250kSPS
Dac Settling Time
4µs
Max Pos Supply (v)
+15.75V
Single-supply
No
Dac Type
Voltage Out
Dac Input Format
Byte

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AD7837 Summary of contents

Page 1

...

Page 2

... Guaranteed by design and characterization, not production tested. = ± (See typical performance graphs.). 4 The Devices are functional with Specifications subject to change without notice + connected to R AD7837]. All specifications T OUT FB B Version S Version Units 12 12 Bits ± 1/2 ± 1 LSB max ± 1 ± 1 LSB max ± ...

Page 3

... All input signals are specified with (10 and timed from a voltage level of 1 See Figures 3 and 5. 3 Guaranteed by design and characterization, not production tested. 4 AD7837 only. ABSOLUTE MAXIMUM RATINGS (T = +25°C unless otherwise noted DGND, AGNDA, AGNDB . . . . . . . –0 +17 V ...

Page 4

... DAC latches is not changed. For the AD7837 measured with LDAC held high. For the AD7847 measured with CSA and CSB held high. Digital Crosstalk ...

Page 5

... Data Bit 11 (MSB). WR Write Input positive edge triggered input which is used in conjunction with CSA and CSB 13 to write data to the DAC latches. 14–24 DB10–DB0 Data Bit 10 to Data Bit 0 (LSB). AD7837 PIN CONFIGURATION DIP AND SOIC FBA V ...

Page 6

... AD7837/AD7847–Typical Performance Graphs 10 0 – +15V –15V +20Vp–p REF –20 DAC CODE = 111...111 – FREQUENCY – Hz 0.5 0 7.5V REF 0.3 0.2 INL 0.1 DNL 0 – Volts DD SS –50 – +15V –15V 20V p-p REF – ...

Page 7

... DAC latch. Each input latch is further subdivided into a least- AGND significant 8-bit latch and a most-significant 4-bit latch. Only the data held in the DAC latches determines the outputs from the part. The input control logic for the AD7837 is shown in Figure 13, while the write cycle timing diagram is shown in Figure 14. LDAC CS ...

Page 8

... return high for a period equal , the minimum LDAC pulsewidth greater than t 8 UNIPOLAR BINARY OPERATION Figure 15 shows DAC A on the AD7837/AD7847 connected for unipolar binary operation. Similar connections apply for DAC B. When signal, the circuit performs 2-quad- IN rant multiplication ...

Page 9

... APPLICATIONS PROGRAMMABLE GAIN AMPLIFIER (PGA) The dual DAC/amplifier combination along with access to R make the AD7837 ideal as a programmable gain amplifier. In this application, the DAC functions as a programmable resistor in the amplifier feedback loop. This type of configuration is shown in Figure 17 and is suitable for ac gain control. The circuit con- sists of two PGAs in series ...

Page 10

... The best method of ensuring AD7847 V that both AGNDs and DGND are equal is to connect them OUTA together at the AD7837/AD7847 on the circuit board. In more V OUTB complex systems where the AGND and DGND intertie is on the backplane recommended that two diodes be connected in ...

Page 11

... AD7837–8051/8088 Interface Figure 23 shows the connection diagram for interfacing the AD7837 to both the 8051 and the 8088. On the 8051, the signal PSEN is used to enable the address decoder while DEN is used on the 8088. A15 ...

Page 12

... AD7837/AD7847 AD7837–6502/6809 Interface Figure 25 shows an interface between the AD7837 and the 6502 or 6809 microprocessor. For the 6502 microprocessor, the φ2 clock is used to generate the WR, while for the 6809 the E sig- nal is used. 24-Lead Plastic DIP (N-24) 1.228 (31.19) 1.226 (31.14 0.261 (6. PIN 1 0 ...

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