OP4177 Analog Devices, OP4177 Datasheet - Page 15

• Manufacturer Part Number: OP4177
• Description: Precision Low Noise, Low Input Bias Current Quad Op Amp
• Manufacturer: Analog Devices

Specifications of OP4177

• -3db Bandwidth: 1.3MHz
• Slew Rate: 700mV/µs
• Vos: 15µV
• Ib: 500pA
• # Opamps Per Pkg: 4
• Input Noise (nv/rthz): 7.9nV/rtHz
• Vcc-vee: 5V to 36V
• Isy Per Amplifier: 500µA
• Packages: SOIC,SOP

INPUT OVERVOLTAGE PROTECTION
When input voltages exceed the positive or negative supply
voltage, most amplifiers require external resistors to protect
them from damage.
The OPx177 has internal protective circuitry that allows voltages as
high as 2.5 V beyond the supplies to be applied at the input of
either terminal without any harmful effects.
Use an additional resistor in series with the inputs if the voltage
exceeds the supplies by more than 2.5 V. The value of the resistor
can be determined from the formula
With the OPx177 low input offset current of <1 nA maximum,
placing a 5 kΩ resistor in series with both inputs adds less than
5 μV to input offset voltage and has a negligible impact on the
overall noise performance of the circuit.
5 kΩ protects the inputs to more than 27 V beyond either supply.
Refer to the THD + Noise section for additional information on
noise vs. source resistance.
OUTPUT PHASE REVERSAL
Phase reversal is defined as a change of polarity in the amplifier
transfer function. Many operational amplifiers exhibit phase
reversal when the voltage applied to the input is greater than the
maximum common-mode voltage. In some instances, this can
cause permanent damage to the amplifier. In feedback loops, it
can result in system lockups or equipment damage. The OPx177
is immune to phase reversal problems even at input voltages
beyond the supplies.
R
(
V
S
IN
+
500
−
V
S
Ω
)
≤
5
mA
Figure 52. Gain Linearity
OPA277
(5V/DIV)
V
R
SY
L
= 2kΩ
= ±15V
Rev. G | Page 15 of 24
SETTLING TIME
Settling time is defined as the time it takes an amplifier output
to reach and remain within a percentage of its final value after
application of an input pulse. It is especially important in measure-
ment and control circuits in which amplifiers buffer ADC inputs
or DAC outputs.
To minimize settling time in amplifier circuits, use proper
bypassing of power supplies and an appropriate choice of circuit
components. Resistors should be metal film types, because they
have less stray capacitance and inductance than their wire-wound
counterparts. Capacitors should be polystyrene or polycarbonate
types to minimize dielectric absorption.
The leads from the power supply should be kept as short as
possible to minimize capacitance and inductance. The OPx177
has a settling time of about 45 μs to 0.01% (1 mV) with a 10 V
step applied to the input in a noninverting unity gain.
OVERLOAD RECOVERY TIME
Overload recovery is defined as the time it takes the output
voltage of an amplifier to recover from a saturated condition to
its linear response region. A common example is one in which
the output voltage demanded by the transfer function of the
circuit lies beyond the maximum output voltage capability of
the amplifier. A 10 V input applied to an amplifier in a closed-
loop gain of 2 demands an output voltage of 20 V. This is beyond
the output voltage range of the OPx177 when operating at ±15 V
supplies and forces the output into saturation.
Recovery time is important in many applications, particularly
where the operational amplifier must amplify small signals in
the presence of large transient voltages.
Figure 53. No Phase Reversal
OP1177/OP2177/OP4177
TIME (400µs/DIV)
V
IN
V
OUT
V
A
SY
V
= 1
=
10V