AD8002 Analog Devices, AD8002 Datasheet - Page 10

• Manufacturer Part Number: AD8002
• Description: Dual 600 MHz, 50 mW Current Feedback Amplifier
• Manufacturer: Analog Devices

Specifications of AD8002

• Vcc-vee: 6V to 12V
• Isy Per Amplifier: 11.5mA
• Packages: DIP,SOIC,SOP
• -3db Bandwidth: 600MHz
• Slew Rate: 1.2kV/µs
• Vos: 2mV
• Ib: 3µA
• # Opamps Per Pkg: 2
• Input Noise (nv/rthz): 2nV/rtHz

AD8002
THEORY OF OPERATION
A very simple analysis can put the operation of the AD8002, a
current feedback amplifier, in familiar terms. Being a current
feedback amplifier, the AD8002’s open-loop behavior is expressed
as transimpedance, ∆V
pedance behaves just as the open-loop voltage gain of a voltage
feedback amplifier, that is, it has a large dc value and decreases
at roughly 6 dB/octave in frequency.
Since the R
gain is just T
conductance of the input stage. This results in a low open-loop
input impedance at the inverting input, a now familiar result.
Using this amplifier as a follower with gain, Figure 4, basic
analysis yields the following result.
Recognizing that G × R
the first order that bandwidth for this amplifier is independent
of gain (G).
Considering that additional poles contribute excess phase at
high frequencies, there is a minimum feedback resistance below
which peaking or oscillation may result. This fact is used to
determine the optimum feedback resistance, R
parasitic capacitance at the inverting input terminal will also add
phase in the feedback loop, so picking an optimum value for R
can be difficult.
Achieving and maintaining gain flatness of better than 0.1 dB at
frequencies above 10 MHz requires careful consideration of
several issues.
Choice of Feedback and Gain Resistors
The fine scale gain flatness will, to some extent, vary with
feedback resistance. It, therefore, is recommended that once
optimum resistor values have been determined, 1% tolerance
values should be used if it is desired to maintain flatness over a
wide range of production lots. In addition, resistors of different
construction have different associated parasitic capacitance
and inductance. Surface mount resistors were used for the bulk
of the characterization for this data sheet. It is not recommended
that leaded components be used with the AD8002.
IN
Z
is proportional to 1/g
× g
G
V
V
V
R2
IN
O
IN
= +
m
1
, where the g
=
G
O
R
IN
R
/∆I
×
1
2
<< R1 for low gains, it can be seen to
T
–IN
Z
R
, or T
R
( )
IN
S
IN
R1
m
=
+
T
1
Z
in question is the trans-
G R
Z
. The open-loop transim-
m
/
( )
g
, the equivalent voltage
×
S
m
≈
IN
50 Ω
+
R
V
OUT
1
F
. In practice
F
Printed Circuit Board Layout Considerations
As expected for a wideband amplifier, PC board parasitics can
affect the overall closed-loop performance. Of concern are
stray capacitances at the output and the inverting input nodes. If
a ground plane is to be used on the same side of the board as
the signal traces, a space (5 mm min) should be left around the
signal lines to minimize coupling. Additionally, signal lines
connecting the feedback and gain resistors should be short
enough so that their associated inductance does not cause high
frequency gain errors. Line lengths on the order of less than
5 mm are recommended. If long runs of coaxial cable are being
driven, dispersion and loss must be considered.
Power Supply Bypassing
Adequate power supply bypassing can be critical when optimiz-
ing the performance of a high-frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, bypass capacitors
(typically greater than 1 µF) will be required to provide the
best settling time and lowest distortion. A parallel combina-
tion of 4.7 µF and 0.1 µF is recommended. Some brands of
electrolytic capacitors will require a small series damping resis-
tor ≈4.7 Ω for optimum results.
DC Errors and Noise
There are three major noise and offset terms to consider in a
current feedback amplifier. For offset errors, refer to the equa-
tion below. For noise error, the terms are root-sum-squared to
give a net output error. In the circuit shown in Figure 5 they
are input offset (V
the noise gain of the circuit (1 + R
current (I
inverting input current, which, when divided between R
and subsequently multiplied by the noise gain, always appears
at the output as I
is a low 2 nV/√Hz. At low gains, though, the inverting input
current noise times R
layout and device matching contribute to better offset and
drift specifications for the AD8002 compared to many other
current feedback amplifiers. The typical performance curves in
conjunction with the equations below can be used to predict the
performance of the AD8002 in any application.
V
OUT
=
BN
V
IO
× R
×
R
R
N



BN
N
1
I
), also multiplied by the noise gain, and the
IO
+
), which appears at the output multiplied by
× R
F
R
R
is the dominant noise source. Careful
F
I
F
I
I
BI
. The input voltage noise of the AD8002
BN

 ±

I
BN
R
F
×
R
F
N
/R
I
×
), noninverting input



1
+
R
R
V
F
I
OUT

 ±

I
BI
F
and R
×
R
F
I