ADM1178 Analog Devices, ADM1178 Datasheet
ADM1178
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ADM1178 Summary of contents
Page 1
... FET in the power path. The voltage across the sense resistor (and therefore the inrush current) is kept below a preset maximum. The ADM1178 protects the external FET by limiting the time that the maximum current runs through it. This current limit period is set by the value of the capacitor attached to the TIMER pin. ...
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... Changes to Figure 40 ...................................................................... 19 Changes to Table 9 and Table 11 ................................................... 19 Changes to Converting ADC Codes to Voltage and Current Readings Section ......................................................... 20 Initial Timing Cycle ................................................................... 14 Hot Swap Retry Cycle on the ADM1178-1 ............................. 15 Voltage and Current Readback ..................................................... 16 Serial Bus Interface ..................................................................... 16 Identifying the ADM1178 on the I General I Write and Read Operations ........................................................... 18 Quick Command ...
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... Rev Page ADM1178 Unit Conditions VCC rising < 1.5 V μ rising mV μ −100 μA ALERT −2 mA ALERT μ ALERTB not asserted ...
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... ADM1178 Parameter 1 MONITORING ACCURACY Current Sense Absolute Accuracy 0°C to +70°C 0°C to +85°C −40°C to +85° for ADC Full Scale SENSE Voltage Sense Accuracy 0°C to +70°C 0°C to +85°C −40°C to +85° for ADC Full Scale ...
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... Time between the receipt of the command byte and the actual ADC result being placed in the register. 5 Guaranteed by design; not production tested. Min Typ Max 600 1300 150 4 10 600 100 900 600 1300 400 Rev Page ADM1178 Unit Conditions ns ns μs μ ...
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... ADM1178 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter VCC Pin SENSE Pin TIMER Pin ON Pin ALERTB Pin GATE Pin SDA Pin, SCL Pin ADR Pin Storage Temperature Range Operating Temperature Range Lead Temperature Range (Soldering, 10 sec) Junction Temperature Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only ...
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... ADM1178 when a low supply voltage is detected. 2 SENSE Current Sense Input Pin. A sense resistor between the VCC pin and the SENSE pin sets the analog current limit. The hot swap operation of the ADM1178 controls the external FET gate to maintain the (V voltage at or below 100 mV Undervoltage Input Pin ...
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... ADM1178 TYPICAL PERFORMANCE CHARACTERISTICS 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 (V) CC Figure 4. Supply Current vs. Supply Voltage (V) CC Figure 5. Drive Voltage (V − vs. Supply Voltage GATE CC 0 –2 –4 –6 –8 –10 –12 – ...
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... Rev Page HIGH LOW (V) CC Figure 13. Timer Threshold vs. Supply Voltage HIGH LOW – TEMPERATURE (°C) Figure 14. Timer Threshold vs. Temperature 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 C (µF) TIMER Figure 15. Gate On Time vs. Timer Capacitance, During Current Limiting Condition ADM1178 4 ...
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... ADM1178 0 –1 –2 –3 –4 –5 – (V) CC Figure 16. Timer Pull-Up Current (Initial Cycle) vs. Supply Voltage 0 –10 –20 –30 –40 –50 –60 –70 – (V) CC Figure 17. Timer Pull-Up Current (Circuit Breaker Delay) vs. Supply Voltage 3.0 2.5 2.0 1.5 1.0 0 ...
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... Figure 27. ADC Noise with 7:1 Voltage Channel Input, and 1000 Reads Rev Page ADM1178 2046 2047 2048 2049 2050 CODE 779 780 781 782 783 CODE 3078 3079 3080 ...
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... ADM1178 –1 –2 –3 –4 0 500 1000 1500 2000 2500 CODE Figure 28. INL for ADC –1 –2 –3 –4 0 500 1000 1500 2000 2500 CODE Figure 29. DNL for ADC 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 –40 – TEMPERATURE (°C) Figure 30. ALERTB Output Low Voltage vs. Temperature @ 1 mA ...
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... When there is a supply voltage greater than 2.8 V, the ADM1178 starts the initial timing cycle. ON FUNCTION The ADM1178 has an active high ON pin. The ON pin is the input to a comparator that has a low-to-high threshold of 1 hysteresis, and a glitch filter of 3 μs. A low input on the ON pin turns off the hot swap operation by pulling the GATE pin to ground, turning off the external FET ...
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... As soon as the current drops below the overcurrent fault timing threshold, the current into the TIMER pin switches from being a 60 μA pull-up to being a 100 μA pull-down. The ADM1178 then drives the GATE voltage as high as it can to fully enhance the FET and reduce R losses to a minimum. ...
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... TIMER capacitor with a 60 μA pull-up current. When the TIMER pin reaches 1.3 V, the fault current limit time is reached, and the GATE pin is pulled down. On the ADM1178-1, the TIMER pin is then pulled down with a 2 μA current sink. When the TIMER pin reaches 0 automatically restarts the hot swap operation ...
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... IDENTIFYING THE ADM1178 ON THE I The ADM1178 has a 7-bit serial bus slave address. When the device powers up, it does so with a default serial bus address. The three MSBs of the address are set to 111, and the two MSBs are set to 10, resulting in an address of 111x10 ...
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... ACKNOWLEDGE BY MASTER 2 Figure 36. General I C Read Timing Diagram HIGH SU;STA t SU;DAT S Figure 37. Serial Bus Timing Diagram Rev Page ADM1178 ACKNOWLEDGE BY SLAVE STOP ACKNOWLEDGE BY BY SLAVE FRAME N MASTER DATA BYTE 9 D3 ...
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... C6 0 STATUS_RD Status read. When this bit is set, the data byte read back from the ADM1178 is the status byte. This contains the status of the device alerts. See Table 15 for full details of the status byte. WRITE COMMAND BYTE In the write command byte operation, the master device sends a command byte to the slave device, as follows: 1 ...
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... Table 9, Table 10, and Table 11 provide the details of each extended register. Table 8. Extended Register Addresses Rev Page ADM1178 EXTENDED REGISTER COMMAND ADDRESS BYTE A1 A0 Extended Register 0 1 ALERT_EN 1 0 ALERT_TH 1 1 CONTROL ...
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... I11 I10 I9 3 Voltage LSBs Voltage Readback The ADM1178 digitizes voltage only. Two bytes are read back in the format shown in Table 13. Table 13. Voltage Only Readback Format Byte Contents Voltage MSBs V11 V10 ...
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... The state of the ON pin. Set the input pin is deasserted. Can also be set writing to the SWOFF bit of the CONTROL register. 5 OFF_ALERT An alert has been caused by either the ON pin or the SWOFF bit. Cleared by writing to Bit 4 of the ALERT_EN register. Rev Page ADM1178 ...
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... CH3 20.0V Figure 47. Overcurrent Condition During Operation (ADM1178-1 Model) (Channel Channel GATE OUT CH1 1.5A CH3 20.0V Figure 48. Overcurrent Condition During Operation (ADM1178-2 Model) (Channel Channel GATE OUT , Channel GATE OUT Rev Page CH2 1.00V M10.0ms CH4 10 ...
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... When an over- current condition occurs, the ADM1178 pulls this output low. If any of the enabled latched alerts in the status byte (ADC_ALERT, HS_ALERT, and OFF_ALERT) are triggered, the ALERTB output asserts ...
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... Hot Swap Retry Option 1 ADM1178-1ARMZ-R7 Automatic Retry Version 1 ADM1178-2ARMZ-R7 Latched Off Version 1 EVAL-ADM1178EBZ RoHS Compliant Part. 2 Purchase of licensed I C components of Analog Devices, Inc., or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I Patent Rights to use these components system, provided that the system conforms to the I © ...