ADM1168 Analog Devices, ADM1168 Datasheet - Page 17

• Manufacturer Part Number: ADM1168
• Description: Super Sequencer and Monitor with Nonvolatile Fault Recording
• Manufacturer: Analog Devices

Specifications of ADM1168

• # Supplies Monitored: 8
• Volt Monitoring Accuracy: 1%
• # Output Drivers: 8
• Fet Drive/enable Output: Both
• Package: 32 ld LQFP

VP1
VX4
Monitoring Fault Detector
The monitoring fault detector block is used to detect a failure on an
input. The logical function implementing this is a wide OR gate
that can detect when an input deviates from its expected condition.
The clearest demonstration of the use of this block is in the
PWRGD state, where the monitor block indicates that a failure
on one or more of the VPx, VXx, or VH inputs has occurred.
No programmable delay is available in this block because the
triggering of a fault condition is likely to be caused by a supply
falling out of tolerance. In this situation, the device needs to react as
quickly as possible. Some latency occurs when moving out of this
state, however, because it takes a finite amount of time (~20 μs) for
the state configuration to download from the EEPROM into the
SE. Figure 22 is a block diagram of the monitoring fault detector.
Timeout Detector
The timeout detector allows the user to trap a failure to ensure
proper progress through a power-up or power-down sequence.
In the sample application shown in Figure 21, the timeout next-
state transition is from the EN3V3 and EN2V5 states. For the
EN3V3 state, the signal 3V3ON is asserted on the PDO1 output
pin upon entry to this state to turn on a 3.3 V supply.
This supply rail is connected to the VP2 pin, and the sequence
detector looks for the VP2 pin to go above its undervoltage
threshold, which is set in the supply fault detector (SFD) attached
to that pin.
The power-up sequence progresses when this change is detected. If,
however, the supply fails (perhaps due to a short circuit overloading
this supply), the timeout block traps the problem. In this example,
if the 3.3 V supply fails within 10 ms, the SE moves to the DIS3V3
state and turns off this supply by bringing PDO1 low. It also
indicates that a fault has occurred by taking PDO3 high. Timeout
delays of 100 μs to 400 ms can be programmed.
LOGIC INPUT CHANGE
OR FAULT DETECTION
SUPPLY FAULT
Figure 22. Monitoring Fault Detector Block Diagram
DETECTION
WARNINGS
MONITORING FAULT
DETECTOR
1-BIT FAULT
DETECTOR
1-BIT FAULT
DETECTOR
1-BIT FAULT
DETECTOR
MASK
SENSE
MASK
SENSE
MASK
FAULT
FAULT
FAULT
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FAULT AND STATUS REPORTING
The ADM1168 has a fault latch for recording faults. Two registers,
FSTAT1 and FSTAT2, are set aside for this purpose. A single bit
is assigned to each input of the device, and a fault on that input
sets the relevant bit. The contents of the fault register can be
read out over the SMBus to determine which input(s) faulted.
The fault register can be enabled or disabled in each state. To
latch data from one state, ensure that the fault latch is disabled
in the following state. This ensures that only real faults are
captured and not, for example, undervoltage conditions that
may be present during a power-up or power-down sequence.
The ADM1168 also has a number of status registers. These include
more detailed information, such as whether an undervoltage or
overvoltage fault is present on a particular input. The status
registers also include information on ADC limit faults.
There are two sets of these registers with different behaviors.
The first set of status registers is not latched in any way and,
therefore, can change at any time in response to changes on the
inputs. These registers provide information such as the UV and
OV state of the inputs, the digital state of the GPI VXx inputs,
and the ADC warning limit status.
The second set of registers update each time the sequence engine
changes state and are latched until the next state change. The
second set of registers provides the same information as the first
set, but in a more compact form. The reason for this is that these
registers are used by the black box feature when writing status
information for the previous state into EEPROM.
See the
ADM1168 registers.
NONVOLATILE BLACK BOX FAULT RECORDING
A section of EEPROM, from Address 0xF900 to Address 0xF9FF, is
provided that by default can be used to store user-defined settings
and information. Part of this section of EEPROM, Address 0xF980
to Address 0xF9FF, can instead be used to store up to 16 fault records.
Any sequencing engine state can be designated as a black box write
state. Each time the sequence engine enters that state, a fault record
is written into EEPROM. The fault record provides a snapshot of
the entire ADM1168 state at the point in time when the last state
was exited, just prior to entering the designated black box write
state. A fault record contains the following information:
•
•
•
•
•
•
•
A flag bit set to 0 after the fault record has been written.
The state number of the previous state prior to the fault
record write state.
Did a sequence, timeout, or monitor condition cause the
previous state to exit?
UVSTATx and OVSTATx input comparator status.
VXx GPISTAT status.
LIMSTATx status.
A checksum byte.
AN-721 Application Note
for full details about the
ADM1168