ADP320 Analog Devices, ADP320 Datasheet

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ADP320

Manufacturer Part Number
ADP320
Description
Triple, 200 mA, Low Noise, High PSRR Voltage Regulator
Manufacturer
Analog Devices
Datasheet

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FEATURES
Bias voltage range (VBIAS): 2.5 V to 5.5 V
LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V
Three 200 mA low dropout voltage regulators
16-lead, 3 mm × 3 mm LFCSP
Initial accuracy: ±1%
Stable with 1 µF ceramic output capacitors
No noise bypass capacitor required
3 independent logic controlled enables
Over current and thermal protection
Key specifications
Excellent transient response
Low dropout voltage: 110 mV @ 200 mA load
85 µA typical ground current at no load, all LDOs enabled
100 µs fast turn-on circuit
Guaranteed 200 mA output current per regulator
−40°C to +125°C junction temperature
APPLICATIONS
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
Portable medical devices
Post dc-to-dc regulation
GENERAL DESCRIPTION
The ADP320 200 mA triple output LDO combines high PSRR, low
noise, low quiescent current, and low dropout voltage in a voltage
regulator ideally suited for wireless applications with demanding
performance and board space requirements.
The low quiescent current, low dropout voltage, and wide input
voltage range of the ADP320 triple LDO extend the battery life of
portable devices. The ADP320 triple LDO maintains power supply
rejection greater than 60 dB for frequencies as high as 100 kHz
while operating with a low headroom voltage. The ADP320 triple
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
High PSRR
Low output noise
76 dB PSRR up to 1 kHz
70 dB PSRR 10 kHz
60 dB PSRR at 100 kHz
40 dB PSRR at 1 MHz
29 µV rms typical output noise at V
55 µV rms typical output noise at V
OUT
OUT
= 1.2 V
= 2.8 V
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
LDO offers much lower noise performance than competing LDOs
without the need for a noise bypass capacitor.
The ADP320 triple LDO is available in a miniature 16-lead
3 mm × 3 mm LFCSP package and is stable with tiny 1 µF ±30%
ceramic output capacitors, resulting in the smallest possible board
area for a wide variety of portable power needs.
The ADP320 triple LDO is available in output voltage combin-
ations ranging from 0.8 V to 3.3 V and offers over current and
thermal protection to prevent damage in adverse conditions.
2.5V TO
1.8V TO
1.8V TO
High PSRR Voltage Regulator
5.5V
5.5V
5.5V
VBIAS
VIN1/VIN2
VIN3
Triple, 200 mA, Low Noise,
TYPICAL APPLICATION CIRCUITS
+
+
+
Figure 1. Typical Application Circuit
1µF
1µF
1µF
©2010–2011 Analog Devices, Inc. All rights reserved.
EN1
EN2
EN3
OFF
OFF
OFF
ON
ON
ON
ADP320
EN LD1
EN LD2
EN LD3
LDO 1
LDO 2
LDO 3
VBIAS
VBIAS
VBIAS
GND
ADP320
www.analog.com
VOUT1
VOUT2
VOUT3
+
+
+
1µF
1µF
1µF

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ADP320 Summary of contents

Page 1

... The low quiescent current, low dropout voltage, and wide input voltage range of the ADP320 triple LDO extend the battery life of portable devices. The ADP320 triple LDO maintains power supply rejection greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage ...

Page 2

... ADP320 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Typical Application Circuits ............................................................ 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Input and Output Capacitor, Recommended Specifications .. 4 Absolute Maximum Ratings ............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5 Pin Configurations and Function Descriptions ........................... 6 REVISION HISTORY 4/11—Rev Rev. A Changes to Ordering Guide .......................................................... 20 6/10—Revision 0: Initial Version Typical Performance Characteristics ...

Page 3

... J 2.0 180 = 3 OUT = 2 OUT = 2 OUT = 1 OUT ADP320 = 10 mA, OUT3 Max Unit 5.5 V 5.5 V µA 160 µA µA 220 µA µA 380 µA µA 140 µA µA 2.5 µ ...

Page 4

... ADP320 Parameter Symbol POWER SUPPLY REJECTION RATIO PSRR 1 Based on an end-point calculation using 1 mA and 200 mA loads. 2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 1.8 V. ...

Page 5

... THERMAL DATA Absolute maximum ratings apply individually only, not in combination. The ADP320 triple LDO can be damaged when the junction temperature limits are exceeded. Monitoring ambient temper- ature does not guarantee that the junction temperature (T is within the specified temperature limits. In applications with high power dissipation and poor thermal resistance the maximum ambient temperature may have to be derated ...

Page 6

... Enable Input for Regulator 2. Drive EN1 high to turn on Regulator 2; drive it low to turn off Regulator 2. For automatic startup, connect EN2 to VBIAS Exposed pad for enhanced thermal performance. Connect to copper ground plane. EN1 1 12 GND VBIAS 2 11 GND ADP320 10 VIN3 VIN1/VIN2 VIN3 VIN1/VIN2 TOP VIEW (Not to Scale) NOTES CONNECT. ...

Page 7

... I (mA) LOAD Figure 7. Output Voltage vs. Load Current 1.820 LOAD = 1mA LOAD = 5mA LOAD = 10mA LOAD = 50mA LOAD = 100mA 1.815 LOAD = 200mA 1.810 1.805 1.800 2.1 2.5 2.9 3.3 3.7 4.1 4.5 V (V) IN Figure 8. Output Voltage vs. Input Voltage ADP320 = 25°C, A 125 1000 4.9 5.3 ...

Page 8

... ADP320 1.520 LOAD = 1mA LOAD = 5mA 1.515 LOAD = 10mA LOAD = 50mA LOAD = 100mA 1.510 LOAD = 200mA 1.505 1.500 1.495 1.490 1.485 1.480 –40 – (°C) J Figure 9. Output Voltage vs. Junction Temperature 1.510 1.508 1.506 1.504 1.502 1.500 (mA) LOAD Figure 10. Output Voltage vs. Load Current 1 ...

Page 9

... Figure 20. Bias Current vs. Input Voltage, Single Output Load Rev Page LOAD = 1mA LOAD = 5mA LOAD = 10mA LOAD = 50mA LOAD = 100mA LOAD = 200mA 0 –40 – (° 100 I (mA) LOAD LOAD = 1mA LOAD = 5mA LOAD = 10mA LOAD = 50mA LOAD = 100mA LOAD = 200mA 2.5 2.9 3.3 3.7 4.1 4.5 4.9 V (V) IN ADP320 125 1000 5.3 ...

Page 10

... ADP320 0.9 3.6 3.8 0.8 4.2 4.4 4.8 0.7 5.5 0.6 0.5 0.4 0.3 0.2 0.1 0 –50 – TEMPERATURE (°C) Figure 21. Shutdown Current vs. Temperature at Various Input Voltages 100 LOAD (mA) Figure 22. Dropout Voltage vs. Load Current and Output Voltage 3.3 V OUT1 3.35 LOAD = 1mA LOAD = 5mA LOAD = 10mA 3.30 LOAD = 50mA LOAD = 100mA LOAD = 200mA 3 ...

Page 11

... OUT C = 1µF OUT 100 1k 10k 100k 1M FREQUENCY (Hz) 1.8V/200mA V RIPPLE 1.8V/100mA 1V HEADROOM 1.8V/10mA 1.8V PSRR 1.2V/200mA 1.2 XTALK 1.2V/100mA 1.2V/10mA 100 1k 10k 100k 1M FREQUENCY (Hz) Channel to Channel Crosstalk 100 1k 10k FREQUENCY (Hz LOAD ADP320 200mA 100mA 10mA 1mA 10M = 50mV 10M 3.3V 1.8V 1.5V 100k = 10 mA ...

Page 12

... ADP320 70 3.3V 1.8V 1. 0.001 0.01 0.1 1 LOAD CURRENT (mA) Figure 33. Output Noise vs. Load Current and Output Voltage LOAD1 OUT1 V OUT2 OUT3 Ω B CH1 100mA CH2 50mV M40µ CH3 10mV CH4 10mV W W Figure 34. Load Transient Response, ...

Page 13

... I =1 mA, IN LOAD1 LOAD2 LOAD3 CH1 = V , CH2 = V , CH3 = V , CH4 = V IN OUT1 OUT2 CH1 1V 4.58V CH3 500mV CH1 = V OUT3 Rev Page ADP320 EN V OUT1 V OUT2 V OUT3 CH2 500mV B M100µs A CH1 540mV CH4 500mV W T 10.2% W Figure 40. Turn On Response, ...

Page 14

... PMOS device is pulled higher, allowing less current to VOUT1 flow and decreasing the output voltage. The ADP320 triple LDO is available in multiple output voltage options ranging from 0 3.3 V. The ADP320 triple LDO 0.5V uses the EN1, EN2, and EN3 enable pins to enable and disable REF ...

Page 15

... If an output capacitance greater than 1 µF is required, the input capacitor should be increased to match it. Input and Output Capacitor Properties Any good quality ceramic capacitor may be used with the ADP320 triple LDO, as long as the capacitor meets the minimum capacit- ance and maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with a different behavior over temperature and applied voltage ...

Page 16

... The ADP320 triple LDO has an internal undervoltage lockout circuit that disables all inputs and the output when the input voltage bias, VBIAS, is less than approximately 2.2 V. This ensures that the inputs of the ADP320 triple LDO and the output behave in a predictable manner during power-up. ENABLE FEATURE The ADP320 triple LDO uses the ENx pins to enable and disable the VOUTx pins under normal operating conditions ...

Page 17

... Consider the case where a hard short from VOUTx to GND occurs. At first, the ADP320 triple LDO current limits, so that only 300 mA is conducted into the short. If self-heating of the junction is great enough to cause its temperature to rise above 155° ...

Page 18

... ADP320 140 120 100 0.2 0.4 0.6 TOTAL POWER DISSIPATION (W) Figure 47. Junction Temperature vs. Total Power Dissipation, T 140 120 100 0.2 0.4 0.6 TOTAL POWER DISSIPATION (W) Figure 48. Junction Temperature vs. Total Power Dissipation 1000mm 2 500mm 2 100mm 2 50mm JEDEC T MAX J 0.8 1.0 1.2 = 25°C Figure 49. Junction Temperature vs. Total Power Dissipation, T ...

Page 19

... CONSIDERATIONS Heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the ADP320 triple LDO. However, as can be seen from Table 6, a point of diminishing returns eventually is reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. ...

Page 20

... Model Temperature Range ADP320ACPZ331815R7 −40°C to +125°C −40°C to +125°C ADP320ACPZ-110- RoHS Compliant Part. 2 For additional voltage options, contact a local sales or distribution representative. ©2010–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. ...

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