ADP5037

Manufacturer Part NumberADP5037
DescriptionDual 3 MHz, 800 mA Buck Regulators with Two 300 mA LDOs
ManufacturerAnalog Devices
ADP5037 datasheet
 


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Data Sheet
FEATURES
Main input voltage range: 2.3 V to 5.5 V
Two 800 mA buck regulators and two 300 mA LDOs
24-lead, 4 mm × 4 mm LFCSP package
Regulator accuracy: ±3%
Factory programmable or external adjustable VOUTx
3 MHz buck operation with forced PWM and auto PWM/PSM
modes
BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V
LDO1/LDO2: output voltage range from 0.8 V to 5.2 V
LDO1/LDO2: input supply voltage from 1.7 V to 5.5 V
LDO1/LDO2: high PSRR and low output noise
APPLICATIONS
Power for processors, ASICS, FPGAs, and RF chipsets
Portable instrumentation and medical devices
Space constrained devices
GENERAL DESCRIPTION
The
ADP5037
combines two high performance buck regulators
and two low dropout (LDO) regulators in a small, 24-lead 4 mm ×
2.3V TO
5.5V
1.7V TO
5.5V
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Regulators with Two 300 mA LDOs
4 mm LFCSP to meet demanding performance and board space
requirements.
The high switching frequency of the buck regulators enables tiny
multilayer external components and minimizes the board space.
When the MODE pin is set high, the buck regulators operate in
forced PWM mode. When the MODE pin is set low and the
load is above a predefined threshold, the buck regulators
operate in PWM mode. When the load current falls below a
predefined threshold, the regulator operates in power save
mode (PSM), improving the light-load efficiency.
The two bucks operate out of phase to reduce the input capaci-
tor requirement. The low quiescent current, low dropout voltage,
and wide input voltage range of the
battery life of portable devices. The
power supply rejection greater than 60 dB for frequencies as
high as 10 kHz while operating with a low headroom voltage.
Regulators in the
enable pins. The default output voltages can be externally set in
the adjustable version or factory programmable to a wide range
of preset values in the fixed voltage version.
TYPICAL APPLICATION CIRCUIT
AVIN
HOUSEKEEPING
C
AVIN
VOUT1
0.1µF
VIN1
SW1
C1
FB1
4.7µF
BUCK1
PGND1
ON
EN1
EN1
OFF
MODE
MODE
VOUT2
VIN2
MODE
SW2
C2
4.7µF
BUCK2
FB2
EN2
EN2
PGND2
EN3
VOUT3
EN3
LDO1
FB3
VIN3
(ANALOG)
C3
1µF
EN4
ON
VOUT4
EN4
OFF
LDO2
FB4
VIN4
(DIGITAL)
C4
1µF
ADP5037
AGND
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Dual 3 MHz, 800 mA Buck
ADP5037
ADP5037
LDOs extend the
ADP5037
LDOs maintain
ADP5037
are activated though dedicated
L1 1µH
V
AT
OUT1
800mA
R1
C5
R2
10µF
PWM
PSM/PWM
L2 1µH
V
AT
OUT2
800mA
R3
C6
R4
10µF
V
AT
OUT3
300mA
R5
C7
1µF
R6
V
AT
OUT4
300mA
R7
C8
1µF
R8
www.analog.com
©2011-2012 Analog Devices, Inc. All rights reserved.

ADP5037 Summary of contents

  • Page 1

    ... C4 1µF ADP5037 AGND Figure 1. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 Dual 3 MHz, 800 mA Buck ADP5037 ADP5037 LDOs extend the ADP5037 LDOs maintain ADP5037 are activated though dedicated L1 1µ OUT1 800mA 10µF ...

  • Page 2

    ... ADP5037 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Typical Application Circuit ............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 General Specifications ................................................................. 3 BUCK1 and BUCK2 Specifications ........................................... 4 LDO1 and LDO2 Specifications ................................................. 4 Input and Output Capacitor, Recommended Specifications .. 5 Absolute Maximum Ratings ............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution .................................................................................. 6 Pin Configuration and Function Descriptions ............................. 7 Typical Performance Characteristics ...

  • Page 3

    ... STBY-NOSW −40°C to +85°C SHUTDOWN J UVLO VIN1RISE UVLO VIN1FALL UVLO VIN1RISE UVLO VIN1FALL to VOUT1, VOUT2, VOUT3, and VOUT4 reaching 90% of their nominal level. Start-up AVIN Rev Page ADP5037 = A Min Typ Max Unit 2.3 5.5 V 150 °C 20 °C 250 µs 300 µ ...

  • Page 4

    ... ADP5037 BUCK1 AND BUCK2 SPECIFICATIONS 2 5 −40°C to +125°C for minimum/maximum specifications, and T AVIN IN1 IN2 J specifications, unless otherwise noted. 1 Table 2. Parameter Symbol OUTPUT CHARACTERISTICS Output Voltage Accuracy ΔV OUT1 ΔV OUT2 Line Regulation (∆V OUT1 (∆V OUT2 Load Regulation (∆ ...

  • Page 5

    ... IN4 OUT4 OUT4 Symbol Min 4.7 MIN1 MIN2 MIN1 MIN2 1.0 MIN3 MIN4 R 0.001 ESR Rev Page ADP5037 Min Typ Max Unit 0.485 0.5 0.515 140 mV 100 mV 180 mV 335 600 mA 600 Ω 100 µV rms 60 µV rms ...

  • Page 6

    ... ADP5037 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter AVIN to AGND VIN1, VIN2 to AVIN PGND1, PGND2 to AGND VIN3, VIN4, VOUT1, VOUT2, FB1, FB2, FB3, FB4, EN1, EN2, EN3, EN4, MODE to AGND VOUT3 to AGND VOUT4 to AGND SW1 to PGND1 SW2 to PGND2 Storage Temperature Range Operating Junction Temperature ...

  • Page 7

    ... TOP VIEW SW2 4 15 SW1 (Not to Scale) PGND2 5 14 PGND1 13 MODE NC 6 NOTES CONNECT. DO NOT CONNECT TO THIS PIN RECOMMENDED THAT THE EXPOSED PAD BE SOLDERED TO THE GROUND PLANE. Figure 2. Pin Configuration—View from the Top of the Die Rev Page ADP5037 ...

  • Page 8

    ... ADP5037 TYPICAL PERFORMANCE CHARACTERISTICS 3 25°C, unless otherwise noted. IN1 IN2 IN3 IN4 A 140 120 100 2.3 2.8 3.3 3.8 4.3 INPUT VOLTAGE (V) Figure 3. System Quiescent Current vs. Input Voltage 1 1 3.3 V, All Channels Unloaded OUT2 OUT3 OUT4 IOUT 2 VOUT 50.0mA Ω ...

  • Page 9

    ... OUT V = 1.8 V, PWM Mode OUT2 100 0.001 0.01 0.1 I (A) OUT V = 0.8 V, Auto Mode OUT1 100 0.001 0.01 0.1 I (A) OUT V = 0.8 V, PWM Mode OUT1 ADP5037 2. ...

  • Page 10

    ... ADP5037 100 +25° –40° 0.001 0.01 I (A) OUT Figure 15. BUCK1 Efficiency vs. Load Current, Across Temperature 3 3.3 V, Auto Mode IN OUT1 100 +85°C 90 +25° –40° 0.001 0.01 I (A) OUT Figure 16. BUCK2 Efficiency vs. Load Current, Across Temperature ...

  • Page 11

    ... CH4 5.00V T 60.000µs W from mA, OUT1 V = 3.3 V, Auto Mode OUT1 VOUT 1 I OUT 2 50.0mA Ω CH1 50.0mV CH2 M 20.0µs A CH2 CH4 5.00V W T 22.20% from mA, OUT2 V = 1.8 V, Auto Mode OUT2 ADP5037 4.80V = 4 5.0 V, 356mA 379mA ...

  • Page 12

    ... ADP5037 VOUT 1 I OUT 2 CH2 200mA Ω CH1 50.0mV M 20.0µs A CH2 CH4 5.00V W T 20.40% Figure 27. BUCK1 Response to Load Transient 3.3 V, Auto Mode OUT1 VOUT 1 I OUT 2 CH2 200mA Ω CH1 100mV M 20.0µs A CH2 CH4 5.00V ...

  • Page 13

    ... LOAD CURRENT (A) IN3 T I OUT 2 VOUT 1 CH2 100mA Ω CH1 100mV M 40.0µs A CH2 19.20% from mA, OUT3 V = 2.8 V OUT3 T VIN VOUT CH1 20.0mV M 100µs A CH3 CH3 1.00V T 28.40 2.8 V OUT3 ADP5037 0. 2.8 V OUT3 52.0mA 4.80V ...

  • Page 14

    ... ADP5037 3. 0.001 0.01 0 (mA) LOAD Figure 39. LDO Output Noise vs. Load Current, Across Input Voltage 2.8 V OUT3 3. 0.001 0.01 0 (mA) LOAD Figure 40. LDO Output Noise vs. Load Current, Across Input Voltage 3.0 V OUT3 0 100µ ...

  • Page 15

    ... the duty cycle. (2b) The ADP5037 includes the power switch conductive losses, the switch losses, and the transition losses of each channel. There are other sources of loss, but these are generally less significant at high output load currents, where the thermal limit of the application is. Equation 8 captures the calculation that must be made to estimate the power dissipation in the buck regulator ...

  • Page 16

    ... RISE FALL switching node, SW. For the ADP5037, the rise and fall times of SW are in the order of 5 ns. If the preceding equations and parameters are used for estimat- ing the converter efficiency, it must be noted that the equations do not describe all of the converter losses, and the parameter values given are typical numbers ...

  • Page 17

    ... CONTROL LOW BUCK2 CURRENT DRIVER AND OP ANTISHOOT MODE THROUGH SEL MODE2 B ENLDO2 600Ω LDO UNDERVOLTAGE LOCKOUT LDO AVIN CONTROL 600Ω ENLDO1 VOUT3 VIN4 FB4 has individual enable pins (EN1 to EN4) control- ADP5037 VIN2 SW2 PGND2 MODE R3 R4 VOUT4 ...

  • Page 18

    ... Figure 46 shows the regulator activation timings for the ADP5037 when all enable pins are connected to AVIN. Also shown is the active pull-down activation. VUVLO VPOR 30µs (MIN) ADP5037 ( = V EN1 = EN2 = EN3 = EN4 AVIN Rev Page Data Sheet is approx- POR 50µ ...

  • Page 19

    ... At this limit, the buck transitions to a mode where the pFET switch stays on 100% of the time. When Rev Page ADP5037 has a dedicated MODE pin controlling the PSM ensures that both bucks operate at the same ADP5037 ensures that when both bucks are in ...

  • Page 20

    ... Figure 46 shows the activation timings for the active pull-downs during regulator activation and deactivation. LDO1 AND LDO2 The ADP5037 contains two LDOs with low quiescent current and low dropout voltage, and provides up to 300 mA of output current. Drawing a low 10 μA quiescent current (typical load makes the LDO ideal for battery-operated portable equipment ...

  • Page 21

    ... Figure 49. Capacitance vs. Voltage Characteristic Dimensions (mm) 2.0 × 1.6 × 0.9 3.2 × 2.5 × 1.5 3.2 × 2.5 × 2.5 4.0 × 4.0 × 2.1 1.9 × 2.0 × 1.0 2.5 × 2.0 × 1.2 Rev Page ADP5037 × (1 − TEMPCO) × (1 − TOL) is 9.2 μ shown in Figure 49. OUT BIAS VOLTAGE (V) I (mA) DCR (mΩ ...

  • Page 22

    ... EN3 EN3 LDO1 FB3 VIN3 (ANALOG) C3 1µF EN4 ON VOUT4 EN4 OFF LDO2 FB4 VIN4 (DIGITAL) C4 1µF ADP5037 AGND Rev Page Data Sheet Case Type Model Size X5R GRM188R60J106 0603 X5R C1608JB0J106K 0603 X5R ECJ1VB0J106M 0603 Case Type Model ...

  • Page 23

    ... ESR value. The ESR of the output capacitor affects stability of the LDO control loop. A minimum of 0.70 µF capacitance with an ESR of 1 Ω or less is recommended to ensure that stability of the ADP5037. Transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance ...

  • Page 24

    ... ADP5037 PCB LAYOUT GUIDELINES Poor layout can affect ADP5037 performance, causing electro- magnetic interference (EMI) and electromagnetic compatibility (EMC) problems, ground bounce, and voltage losses. Poor layout can also affect regulation and stability. A good layout is implemented using the following guidelines. • ...

  • Page 25

    ... PSM/PWM L2 1µ OUT2 800mA R3 C6 10µ OUT3 300mA C7 1µ OUT4 300mA C8 1µF L1 1µ OUT1 800mA 10µF PWM PSM/PWM L2 1µ OUT2 800mA 10µ OUT3 300mA R5 C7 1µ OUT4 300mA R7 C8 1µF R8 ADP5037 ...

  • Page 26

    ... Part Number Vendor JMK105BJ104MV-F Taiyo-Yuden LMK105BJ105MV-F Taiyo-Yuden ECJ-0EB0J475M Panasonic-ECG JMK107BJ106MA-T Taiyo-Yuden BRC1608T1R0M Taiyo-Yuden LQM2MPN1R0NG0B Murata EPL2014-102ML Coilcraft MDT2520-CN Toko ADP5037 Analog Devices Rev Page Data Sheet Package or Dimension (mm) 0402 0402 0402 0603 0603 2.0 × 1.6 × 0.9 2.0 × 2.0 × 1.4 2.5 × 2.0 × 1.2 24-lead LFCSP ...

  • Page 27

    ... MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 4 Package Description 24-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 24-Lead Lead Frame Chip Scale Package [LFCSP_WQ] Evaluation Board for ADP5037ACPZ-R7 ADP5037 Package Option CP-24-10 CP-24-10 ...

  • Page 28

    ... ADP5037 NOTES ©2011-2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09887-0-1/12(A) Rev Page Data Sheet ...