ADAU1445 Analog Devices, ADAU1445 Datasheet - Page 72

• Manufacturer Part Number: ADAU1445
• Manufacturer: Analog Devices

Specifications of ADAU1445

• Instructions/cycles: 3584
• Digital I/o Channels: 24/24
• Analog I/o Channels: 0/0
• Product Description: Digital audio processor with flexible audio routing matrix, 8 × 2-channel ASRC

ADAU1442/ADAU1445/ADAU1446
Frame Clock Pad Strength Register (Address 0xE248
This register controls the pad drive strength of all frame clock pins configured in master mode. The default 2 mA setting should be
adequate for most applications. The 6 mA setting should be used only when the integrity of the signal is compromised.
Table 72. Bit Descriptions of Frame Clock Pad Stren
Bit Position
[15:12]
11
10
9
8
7
6
5
4
3
2
1
0
Description
Reserved
LRCLK11
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK10
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK9
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK8
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK7
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK6
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK5
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK4
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK3
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK2
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK1
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK0
0 = low strength (2 mA)
1 = high strength (6 mA)
gth Register
)
Rev. C | Page 72 of 92
Default
0
0
0
0
0
0
0
0
0
0
0
0