MAX13326GUI/V+T Maxim Integrated Products, MAX13326GUI/V+T Datasheet - Page 17

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MAX13326GUI/V+T

Manufacturer Part Number
MAX13326GUI/V+T
Description
IC AUD LINE DVR DL AUTO 28TSSOP
Manufacturer
Maxim Integrated Products
Type
Line Driver, Transmitterr
Datasheet

Specifications of MAX13326GUI/V+T

Applications
Automotive Audio
Mounting Type
Surface Mount
Package / Case
28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
A master device initiates communication by issuing
a START condition, which is a high-to-low transition
on SDA with SCL high. A START condition from the
master signals the beginning of a transmission to the
MAX13325/MAX13326. The master terminates transmis-
sion by a STOP condition (see the Acknowledge Bit
section). A STOP condition is a low-to-high transition
on SDA while SCL is high (Figure 3). The STOP condi-
tion frees the bus. If a Repeated START condition is
generated instead of a STOP condition, the bus remains
active. When a STOP condition or incorrect slave ID is
detected, the device internally disconnects SCL from the
Figure 3. START/STOP Conditions
Figure 4. Acknowledge and Not-Acknowledge Bits
Table 18. Slave Address
ADD1
GND
GND
SDA
SCL
V
V
V
V
L
L
L
L
ADD0
GND
GND
SCL
SDA
V
V
V
V
L
L
L
L
______________________________________________________________________________________
A6
1
1
1
1
1
1
1
START and STOP Conditions
SDA
SCL
A5
Dual Automotive, Audio Line Drivers
1
1
1
1
1
1
1
SDA
SCL
CONDITION
A4
0
0
0
0
0
0
0
START
with I
S
A3
0
0
0
0
0
0
0
A2
1
0
0
0
1
1
1
1
2
C Control and Diagnostic
A1
0
1
1
0
0
1
1
serial interface until the next START or Repeated START
condition, minimizing digital noise and feedthrough.
The acknowledge (ACK) bit is a clocked 9th bit that
the MAX13325/MAX13326 use to handshake receipt of
each byte of data when in write mode. The MAX13325/
MAX13326 pull down SDA during the entire master-
generated 9th clock pulse if the previous byte is suc-
cessfully received (see Figure 4). Monitoring ACK
allows for detection of unsuccessful data transfers. An
unsuccessful data transfer occurs if a receiving device
is busy or if a system fault has occurred. In the event
A0
1
0
1
0
1
0
1
NOT ACKNOWLEDGE
ACKNOWLEDGE
8
R/W
1/0
1/0
1/0
1/0
1/0
1/0
1/0
CONDITION
9
STOP
ADDRESS
SLAVE
READ
(HEX)
0xCB
0xCD
0xC3
0xC5
0xC7
0xC9
0xCF
ADDRESS
SLAVE
WRITE
(HEX)
0xCA
0xCC
0xC2
0xC4
0xC6
0xC8
0xCE
Acknowledge Bit
MODE
Stand-
alone
I
I
I
I
I
I
I
2
2
2
2
2
2
2
C
C
C
C
C
C
C
17

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