STM8S103K3 STMicroelectronics, STM8S103K3 Datasheet - Page 18
STM8S103K3
Manufacturer Part Number
STM8S103K3
Description
Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM
Manufacturer
STMicroelectronics
Datasheet
1.STM8S103F3.pdf
(113 pages)
Specifications of STM8S103K3
Program Memory
8 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
Data Memory
640 bytes true data EEPROM; endurance 300 kcycles
Ram
1 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization
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Product overview
4.14.2
4.14.3
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Synchronous communication
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LIN master mode
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SPI
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I²C
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Transmission error detection with interrupt generation
Parity control
Full duplex synchronous transfers
SPI master operation
8-bit data communication
Maximum speed: 1 Mbit/s at 16 MHz (f
Emission: Generates 13-bit synch break frame
Reception: Detects 11-bit break frame
Maximum speed: 8 Mbit/s (f
Full duplex synchronous transfers
Simplex synchronous transfers on two lines with a possible bidirectional data line
Master or slave operation - selectable by hardware or software
CRC calculation
1 byte Tx and Rx buffer
Slave/master selection input pin
I²C master features:
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I²C slave features:
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Generation and detection of 7-bit/10-bit addressing and general call
Supports different communication speeds:
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Address bit (MSB)
Idle line (interrupt)
Clock generation
Start and stop generation
Programmable I2C address detection
Stop bit detection
Standard speed (up to 100 kHz)
Fast speed (up to 400 kHz)
DocID15441 Rev 7
MASTER
/2) both for master and slave
CPU
/16)
STM8S103K3 STM8S103F3 STM8S103F2