STM8L151K4 STMicroelectronics, STM8L151K4 Datasheet - Page 39

• Manufacturer Part Number: STM8L151K4
• Description: STM8L-Ultra Low Power-8 bits Microcontrollers
• Manufacturer: STMicroelectronics

Specifications of STM8L151K4

• Temp. Range: - 40 °C to 85, 105 or 125 °C
• 5 Low Power Modes: Wait, Low power run (5.1 μA), Low power wait (3 μA), Active-halt with full RTC (1.3 μA), Halt (350 nA)
• Consumption: 195 μA/MHz+440μA
• Ultralow Leakage Per I/0: 50 nA
• Fast Wakeup From Halt: 4.7 μs
• Lcd: up to 4x28 segments w/ step-up converter
• 4 Channels; Supported Peripherals: ADC, DAC, SPI, I2C, USART, timers
• 2 Watchdogs: 1 Window, 1 Independent

STM8L151xx, STM8L152xx
Table 9.
0x00 509B to
0x00 508A
0x00 508B
0x00 508C
0x00 508D
0x00 508E
0x00 509A
0x00 509D
0x00 509E
0x00 5084
0x00 5085
0x00 5086
0x00 5087
0x00 5088
0x00 5089
0x00 508F
0x00 5090
0x00 5091
0x00 5092
0x00 5093
0x00 5094
0x00 5095
0x00 5096
0x00 5097
0x00 5098
0x00 5099
0x00 509F
Address
General hardware register map (continued)
SYSCFG
DMA1
Block
SYSCFG_RMPCR1
SYSCFG_RMPCR2
DMA1_C1M0ARH
DMA1_C2M0ARH
DMA1_C3M0ARH
DMA1_C1M0ARL
DMA1_C2M0ARL
DMA1_C3M0ARL
DMA1_C3PARH_
DMA1_C3PARL_
DMA1_C2NDTR
DMA1_C3NDTR
DMA1_C2PARH
DMA1_C2PARL
DMA1_C2SPR
DMA1_C3SPR
Register label
DMA1_C2CR
DMA1_C3CR
C3M1ARH
C3M1ARL
Doc ID 15962 Rev 9
DMA1 channel 2 status & priority register
DMA1 channel 3 status & priority register
DMA1 number of data to transfer register
DMA1 number of data to transfer register
DMA1 memory 0 address high register
DMA1 peripheral address high register
DMA1 memory 0 address high register
DMA1 peripheral address high register
DMA1 memory 0 address high register
DMA1 channel 2 configuration register
DMA1 channel 3 configuration register
DMA1 memory 0 address low register
DMA1 peripheral address low register
DMA1 memory 0 address low register
DMA1 peripheral address low register
DMA1 memory 0 address low register
Reserved area (2 bytes)
Reserved area (2 bytes)
Reserved area (3 bytes)
Reserved area (1 byte)
Reserved area (1 byte)
Reserved area (1 byte)
Remapping register 1
Remapping register 2
Register name
(channel 1)
(channel 1)
(channel 2)
(channel 2)
(channel 2)
(channel 2)
(channel 2)
(channel 3)
(channel 3)
(channel 3)
(channel 3)
(channel 3)
Memory and register map
status
Reset
0x00
0x00
0x00
0x00
0x00
0x52
0x00
0x00
0x00
0x00
0x00
0x00
0x40
0x00
0x00
0x00
0x00
0x00
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