STM8L151F2 STMicroelectronics, STM8L151F2 Datasheet - Page 37

• Manufacturer Part Number: STM8L151F2
• Description: STM8L-Ultra Low Power-8 bits Microcontrollers
• Manufacturer: STMicroelectronics

Specifications of STM8L151F2

• Operating Power Supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
• Temperature Range: -40 to 85 or 125 °C
• 5 Low Power Modes: Wait, Low power run, Low power wait, Active-halt with RTC, Halt
• Ultralow Leakage Per I/0: 50 nA
• Fast Wakeup From Halt: 5 μs
• Max Freq: 16 MHz, 16 CISC MIPS peak

STM8L151x2, STM8L151x3
Table 8.
0x00 50CC
0x00 50CD
0x00 50CA
0x00 50CB
0x00 50CE
0x00 50CF
0x00 50C0
0x00 50C1
0x00 50C2
0x00 50C3
0x00 50C4
0x00 50C5
0x00 50C6
0x00 50C7
0x00 50C8
0x00 50C9
0x00 50D0
0x00 50D1
0x00 50D2
0x00 50D3
0x00 50D4
0x00 50D5
0x00 50E0
0x00 50E1
0x00 50E2
0x00 50E3
0x00 50EF
0x00 50F0
0x00 50F1
0x00 50F2
0x00 50F3
0x00 50F4
0x00 513F
Address
00 50DF
to
to
to
to
General hardware register map (continued)
WWDG
Block
IWDG
BEEP
CLK
CLK_HSIUNLCKR
CLK_HSITRIMR
CLK_PCKENR1
CLK_PCKENR2
CLK_PCKENR3
CLK_HSICALR
CLK_REGCSR
Register label
CLK_CBEEPR
CLK_CKDIVR
CLK_CRTCR
CLK_ECKCR
BEEP_CSR1
BEEP_CSR2
CLK_ICKCR
WWDG_WR
CLK_SWCR
CLK_CCOR
WWDG_CR
CLK_SCSR
CLK_CSSR
IWDG_RLR
CLK_SWR
IWDG_PR
IWDG_KR
Doc ID 018780 Rev 3
Reserved area (11 bytes)
Reserved area (13 bytes)
Reserved area (76 bytes)
Reserved area (2 bytes)
CLK HSI clock calibration trimming register
CLK main regulator control status register
CLK configurable clock control register
CLK peripheral clock gating register 1
CLK peripheral clock gating register 2
CLK peripheral clock gating register 3
CLK external clock control register
CLK clock security system register
CLK internal clock control register
CLK clock master divider register
CLK system clock status register
CLK system clock switch register
CLK clock switch control register
BEEP control/status register 1
Reserved area (2 bytes)
BEEP control/status register 2
CLK HSI calibration register
CLK clock BEEP register
CLK HSI unlock register
IWDG prescaler register
WWDR window register
CLK clock RTC register
WWDG control register
IWDG reload register
IWDG key register
Register name
Memory and register map
Reset status
0bxx11 100X
0x00
0xXX
0x03
0x11
0x00
0x00
0x00
0x01
0x01
0xX0
0x00
0x00
0x00
0x00
0x7F
0x7F
0x01
0x00
0xFF
0x1F
0x00
0x00
0x00
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