STM8L162M8 STMicroelectronics, STM8L162M8 Datasheet - Page 37

• Manufacturer Part Number: STM8L162M8
• Description: STM8L-Ultra Low Power-8 bits Microcontrollers
• Manufacturer: STMicroelectronics

Specifications of STM8L162M8

• Operating Power Supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
• Temperature Range: − 40 to 85 or 125 °C
• 5 Low Power Modes: Wait, Low power run, Low power wait, Active-halt with RTC, Halt
• Ultralow Leakage Per I/0: 50 nA
• Fast Wakeup From Halt: 5 μs
• Max Freq: 16 MHz, 16 CISC MIPS peak
• Lcd: 8x40 or 4x44 w/ step-up converter

STM8L162R8, STM8L162M8
Table 8.
0x00 509B to
0x00 508A
0x00 508B
0x00 508C
0x00 508D
0x00 508E
0x00 509A
0x00 509C
0x00 5083
0x00 5084
0x00 5085
0x00 5086
0x00 5087
0x00 5088
0x00 5089
0x00 508F
0x00 5090
0x00 5091
0x00 5092
0x00 5093
0x00 5094
0x00 5095
0x00 5096
0x00 5097
0x00 5098
0x00 5099
Address
General hardware register map (continued)
DMA1
DMA1
DMA1
DMA1
Block
DMA1_C1M0ARH
DMA1_C2M0ARH
DMA1_C3M0ARH
DMA1_C1M0ARL
DMA1_C2M0ARL
DMA1_C3M0ARL
DMA1_C3PARH_
DMA1_C3PARL_
DMA_C3M0EAR
DMA1_C2NDTR
DMA1_C3NDTR
DMA1_C2PARH
DMA1_C1PARL
DMA1_C2PARL
DMA1_C2SPR
DMA1_C3SPR
Register label
DMA1_C2CR
DMA1_C3CR
C3M1ARH
C3M1ARL
Doc ID 17959 Rev 2
Reserved area (2 bytes)
Reserved area (2 bytes)
Reserved area (3 bytes)
Reserved area (1 byte)
DMA1 channel 2 status & priority register
DMA1 channel 3 status & priority register
DMA1 number of data to transfer register
DMA1 number of data to transfer register
DMA1 memory 0 address high register
DMA1 peripheral address high register
DMA1 memory 0 address high register
DMA1 peripheral address high register
DMA1 memory 0 address high register
DMA1 channel 2 configuration register
DMA1 channel 3 configuration register
DMA1 memory 0 address low register
DMA1 memory 0 address low register
DMA1 memory 0 address low register
DMA1 peripheral address low register
DMA1 peripheral address low register
DMA1 peripheral address low register
DMA channel 3 memory 0 extended
Reserved area (1 byte)
address register
Register name
(channel 1)
(channel 1)
(channel 1)
(channel 2)
(channel 2)
(channel 2)
(channel 2)
(channel 2)
(channel 3)
(channel 3)
(channel 3)
(channel 3)
(channel 3)
Memory and register map
status
Reset
0x00
0x00
0x00
0x00
0x00
0x00
0x52
0x00
0x00
0x00
0x00
0x00
0x00
0x40
0x00
0x00
0x00
0x00
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