71M6513 Maxim, 71M6513 Datasheet
71M6513
Available stocks
Related parts for 71M6513
71M6513 Summary of contents
Page 1
... A Maxim Integrated Products Brand GENERAL DESCRIPTION The 71M6513 is a highly integrated system-on-chip SoC with an MPU core, real-time clock (RTC), flash, and LCD driver. Our Single Converter Technology® with a 21-bit delta-sigma ADC, six analog inputs, digital tem- perature compensation, precision voltage reference, and 32-bit computation engine (CE) supports a wide range of poly-phase metering applications with very few low-cost external components ...
Page 2
... Real-Time Monitor ..................................................................................................... 13 CE Functional Overview ............................................................................................ 13 80515 MPU Core .................................................................................................................... 16 80515 Overview ........................................................................................................ 16 Memory Organization ................................................................................................ 16 Special Function Registers (SFRs) ............................................................................. 18 Special Function Registers (Generic 80515 SFRs) ..................................................... 19 Special Function Registers Specific to the 71M6513 ................................................... 22 Instruction Set ........................................................................................................... 23 UART ........................................................................................................................ 23 Timers and Counters ................................................................................................. 26 WD Timer (Software Watchdog Timer) ....................................................................... 28 Interrupts ................................................................................................................... 31 External Interrupts ..................................................................................................... 34 Interrupt Priority Level Structure ...
Page 3
... I/O RAM MAP – In Numerical Order ......................................................................................... 59 SFR MAP (SFRs Specific to Teridian 80515) – In Numerical Order ........................................... 60 I/O RAM (Configuration RAM) – Alphabetical Order.................................................................. 61 CE Program and Environment ................................................................................................. 67 CE Program .............................................................................................................. 67 Formats..................................................................................................................... 67 71M6513/71M6513H 3-Phase Energy Meter IC © 2005-2011 Teridian Semiconductor Corporation DATA SHEET SEPTEMBER 2011 Page 104 ...
Page 4
... Wh Accuracy at Room Temperature ........................................................................................ 77 VARh Accuracy at Room Temperature .................................................................................... 77 Harmonic Performance ............................................................................................................ 78 APPLICATION INFORMATION ............................................................................................................. 79 Connection of Sensors (CT, Resistive Shunt, Rogowski Coil) ................................................... 79 Distinction between 71M6513 and 71M6513H Parts ................................................................. 79 Temperature Compensation and Mains Frequency Stabilization for the RTC............................. 80 External Temperature Compensation ....................................................................................... 81 Temperature Measurement ..................................................................................................... 81 Crystal Oscillator ..................................................................................................................... 83 Connecting LCDs .................................................................................................................... 84 Connecting I2C EEPROMs ...
Page 5
... Figure 29: Resistive Voltage Divider (left), Current Transformer (right) ......................................................................... 79 Figure 30: Resistive Shunt (left), Rogowski Coil (right) ............................................................................................... 79 Figure 31: Crystal Frequency over Temperature .......................................................................................................... 80 Figure 32: Crystal Compensation ............................................................................................................................... 81 Figure 33: Error Band for VREF over Temperature (Regular-Accuracy Parts)................................................................. 83 © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H 3-Phase Energy Meter IC DATA SHEET SEPTEMBER 2011 Page 104 ...
Page 6
... Table 33: The IEN0 Register .................................................................................................................... 32 Table 34: The IEN0 Bit Functions ............................................................................................................. 32 Table 35: The IEN1 Register ................................................................................................................... 32 Table 36: The IEN1 Bit Functions ............................................................................................................ 32 Table 37: The IEN2 Register ................................................................................................................... 33 Table 38: The IEN2 Bit Functions ............................................................................................................ 33 Page 104 71M6513/71M6513H 3-Phase Energy Meter IC © 2005-2011 Teridian Semiconductor Corporation DATA SHEET AUGUST 2011 ...
Page 7
... Table 55: Liquid Crystal Display Segment Table (Typical) ......................................................................... 43 Table 56: EECTRL Status Bits .................................................................................................................. 46 Table 57: TMUX[3:0] Selections .............................................................................................................. 47 Table 58: SSI Pin Assignment ................................................................................................................. 48 Table 59: Power Saving Measures........................................................................................................... 54 Table 60: CHOP_EN Bits.......................................................................................................................... 55 Table 61: Frequency over Temperature ................................................................................................... 80 © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H 3-Phase Energy Meter IC DATA SHEET SEPTEMBER 2011 Page 104 ...
Page 8
... MPU (80515) 0000-07FF PROG FLASH 0000-FFFF (64KB) EERDSLOW EEWRSLOW EMULATOR V3P3 PORT RESETZ Figure 1: IC Functional Block Diagram © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 V3P3A GNDA GNDA VOLTAGE BOOST VDRV LCD_IBST LCD_BSTEN GNDD GNDD VOLT REG V3P3D ...
Page 9
... UART. A block diagram of the chip is shown in Figure 1. A detailed description of various hardware blocks follows. The AFE of the 71M6513 Power Meter IC is comprised of an input multiplexer, a delta-sigma A/D converter with a voltage reference, followed by an FIR filter. A block diagram of the AFE is shown in Figure 3. ...
Page 10
... Voltage Reference The 71M6513/6513H includes an on-chip precision bandgap voltage reference that incorporates auto-zero techniques. The reference of the 71M6513H is trimmed in production to minimize errors caused by component mismatch and drift. The result is a voltage output with a predictable temperature coefficient. The voltage reference is chopper stabilized, i.e. the polarity can be switched by the MPU using the I/O RAM register CHOP_EN (0x2002[5:4]). The two bits in the CHOP_EN register enable the MPU to operate the chopper circuit in regular or inverted operation “ ...
Page 11
... The Functional Description Section contains a chapter with a detailed description on controlling the CHOP_EN register. Temperature Sensor The 71M6513/6513H includes an on-chip temperature sensor implemented as a bandgap reference used to determine the die temperature The MPU may request an alternate multiplexer cycle containing the temperature sensor output by asserting MUX_ALT ...
Page 12
... EQU specifies the equation to be used based on the number and arrangement of phases used for metering. In case of single and two-phase metering, the unconnected inputs should be tied to V3P3A, the analog supply voltage. The EQU selection enables the 71M6513 to calculate polyphase power measurement based on the type of service used. Table 3 also states the sequence of the multiplexer in the AFE. ...
Page 13
... © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 Inputs used from alternate MUX sequence Mux State TEMP TEMP TEMP ...
Page 14
... 13/32768Hz = 397µs 13/32768Hz = 397µs per mux cycle per mux cycle Figure 4: Samples in Multiplexer Cycle 833ms 833ms Figure 5: Accumulation Interval © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 2/32768Hz = 2/32768Hz = 61.04µs 61.04µ XFER_BUSY XFER_BUSY ...
Page 15
... The residual phase error is negligible, and is typically less than ±1.5 milli-degrees at 100Hz, thus it does not contribute to errors in the energy measurements. 71M6513/71M6513H 3-Phase Energy Meter IC is the sampling delay between voltage and current. ...
Page 16
... XRAM, CE DRAM, CE PRAM and I/O RAM, and internal data memory (Internal RAM). Figure 6 shows the memory map (see also Table 54). Internal and External Data Memory: Both internal and external data memory are physically located on the 71M6513 IC. Ex- ternal data memory is only external to the 80515 MPU core. ...
Page 17
... Table 4: Stretch Memory Cycle Width © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 Write signal width memrd memaddr memwr ...
Page 18
... S0RELL DIR0 IEN2 S1CON S1BUF DPS ERASE TL0 TL1 TH0 DPL DPH DPL1 Table 6: Special Function Registers Locations © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET Indirect addressing RAM Bin/Hex X101 X110 X111 USR2 PGADR S1RELL EEDATA EECTRL TH1 CKCON DPH1 ...
Page 19
... IEN1 IP1 0xB9 0x00 0xBA 0x03 S0RELH 0xBB 0x03 S1RELH 71M6513/71M6513H 3-Phase Energy Meter IC Description Port 0 Stack Pointer Data Pointer Low 0 Data Pointer High 0 Data Pointer Low 1 Data Pointer High 1 Watchdog Timer Reload register UART Speed Control Timer/Counter Control ...
Page 20
... User 2 Port, high address byte for MOVX@Ri Interrupt Request Control Register Program Status Word Baud Rate Control Register (only WDCON.7 bit used) Accumulator B Register Table 7: Special Function Registers Reset Values F0 RS1 RS OV Table 8: PSW Register Flags © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 LSB - P ...
Page 21
... Energy Meter IC RS1/RS0 Bank selected 00 Bank 0 01 Bank 1 10 Bank 2 11 Bank 3 Table 9: PSW bit functions © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 Location (0x00 – 0x07) (0x08 – 0x0F) (0x10 – 0x17) (0x18 – 0x1F) Page 104 ...
Page 22
... MPU can output or read data through any of these ports. Even if a DIO pin is configured as an output, the state of the pin can still be read by the MPU, for example when counting pulses issued via DIO pins that are under CE control. Special Function Registers Specific to the 71M6513 Table 11 shows the location and description of the 71M6513-specific SFRs. Register Alternative ...
Page 23
... Software User’s Guide (SUG). UART The 71M6513 includes a UART (UART0) that can be programmed to communicate with a variety of AMR modules. A second UART (UART1) is connected to the optical port, as described in the optical port description. The UART is a dedicated 2-wire serial interface, which can communicate with an external host processor 38,400 bits/s ((with MPU clock = 1 ...
Page 24
... Start bit, 8 data bits, stop bit, variable baud rate f CKMPU Table 13: UART Modes SM20 REN0 TB80 RB80 Table 14: The S0CON Register © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 Using Internal Baud Rate Generator smod /( -S0REL)) CKMPU ...
Page 25
... Transmit interrupt flag, set by hardware after completion of a serial transfer. Must be cleared by software. Receive interrupt flag, set by hardware after completion of a serial reception. Must be cleared by software Table 16: The S0CON Bit Functions © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 LSB TI1 RI1 ...
Page 26
... Receive interrupt flag, set by hardware after completion of a serial reception. Must be cleared by software Table 17: The S1CON Bit Functions M1 M0 GATE C/T Table 18: The TMOD Register © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET Baud Rate variable variable LSB M1 M0 Timer 0 AUGUST 2011 ...
Page 27
... If Timer 1 M1 and M0 bits are set to '1', Timer 1 stops. If Timer 0 M1 and M0 bits are set to '1', Timer 0 acts as two independent 8-bit Timer/Counters. Table 20: Timers/Counters Mode Description TF0 TR0 IE1 IT1 Table 21: The TCON Register © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 LSB IE0 IT0 Page 104 ...
Page 28
... Energy Meter IC Table 22: The TCON Register Bit Functions Timer 1 Mode 0 Mode 1 YES YES YES YES Not allowed Not allowed Table 23: Timer Modes Table 24: The PCON Register © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 Mode 2 YES YES YES LSB ...
Page 29
... Note: The remaining bits in the IEN1 register are not used for watchdog control 3-Phase Energy Meter IC ET2 ES0 ET1 EX1 Table 25: The IEN0 Register (see also Table 32) EX6 EX5 EX4 EX3 © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 LSB ET0 EX0 LSB EX2 Page 104 ...
Page 30
... Page 104 3-Phase Energy Meter IC IP0.5 IP0.4 IP0.3 IP0.2 Table 29: The IP0 Register (see also Table 45 Table 31: The WDTREL Register Table 32: The WDTREL Bit Functions © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 LSB IP0.1 IP0.0 LSB 1 0 ...
Page 31
... SFRs IEN0, IEN1, and IEN2. External interrupts are the interrupts external to the 80515 core, i.e. signals that originate in other parts of the 71M6513/6513H, for example the CE, DIO, RTC EEPROM interface, comparators. Interrupt Overview: When an interrupt occurs, the MPU will vector to the predetermined address as shown in Table 50. Once interrupt service has begun, it can be interrupted only by a higher priority interrupt. The interrupt service is terminated by a return from instruction, " ...
Page 32
... IEN1.3 EX4 IEN1.2 EX3 EX3=0 – disable external interrupt 3 EX2=0 – disable external interrupt 2 IEN1.1 EX2 IEN1.0 - Page 104 71M6513/71M6513H 3-Phase Energy Meter IC ES0 ET1 EX1 Table 33: The IEN0 Register Table 34: The IEN0 Bit Functions EX6 EX5 EX4 EX3 Table 35: The IEN1 Register Table 36: The IEN1 Bit Functions © ...
Page 33
... External interrupt 1 type control bit TCON.2 IT1 TCON.1 IE0 External interrupt 0 flag TCON.0 IT0 External interrupt 0 type control bit Interrupt Request register (IRCON) MSB 71M6513/71M6513H 3-Phase Energy Meter Table 37: The IEN2 Register Table 38: The IEN2 Bit Functions TF0 TR0 IE1 IT1 ...
Page 34
... In this situation, the unprocessed interrupt can create a lockout condition similar to the one in note 1. To prevent this lockout one must always process both interrupt flags in the same service routine. Page 104 71M6513/71M6513H 3-Phase Energy Meter IC Table 42: The IRCON Bit Functions ...
Page 35
... Table 44: Control Bits for External Interrupts Serial channel 1 interrupt - - - - - - Table 45: Priority Level Groups © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 Description External interrupt 0 flag External interrupt 1 flag External interrupt 2 flag External interrupt 3 flag External interrupt 4 flag External interrupt 5 flag ...
Page 36
... Serial channel 1 interrupt Timer 0 interrupt External interrupt 2 External interrupt 1 External interrupt 3 Timer 1 interrupt External interrupt 4 Serial channel 0 interrupt External interrupt 5 External interrupt 6 Table 49: Interrupt Polling Sequence © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 LSB IP0.1 IP0.0 LSB IP1.1 IP1.0 ...
Page 37
... Interrupt Request Flag IE0 TF0 IE1 TF1 RI0/TI0 RI1/TI1 IEX2 IEX3 IEX4 IEX5 IEX6 71M6513/71M6513H 3-Phase Energy Meter IC Description Interrupt Vector Address External interrupt 0 Timer 0 interrupt External interrupt 1 Timer 1 interrupt Serial channel 0 interrupt Serial channel 1 interrupt External interrupt 2 External interrupt 3 External interrupt 4 ...
Page 38
... > IRCON IRCON.2 IRCON.3 > IRCON.4 IRCON.5 Figure 7: Interrupt Structure © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET Enable Priority IEN0.7 IEN0.0 IP1.0/ IP0.0 IEN2.0 IEN0.1 IP1 ...
Page 39
... A Maxim Integrated Products Brand DIO Ports The 71M6513/6513H includes pins of general purpose digital I/ these pins are dual function and can alternatively be used as LCD drivers. Figure 8 shows a block diagram of the DIO section. On reset or power-up, all DIO pins are inputs until they are configured for the desired direction. The pins are configured and controlled by the DIO and DIO_DIR registers (SFRs) and by the five bits of the I/O register LCD_NUM (0x2020[4:0]) ...
Page 40
... Resource Selected for DIO Pin Value 0 NONE 1 Reserved 2 T0 (counter0 clock (counter1 clock) 4 High priority I/O interrupt (INT0 rising) 5 Low priority I/O interrupt (INT1 rising) 6 High priority I/O interrupt (INT0 falling) 7 Low priority I/O interrupt (INT1 falling) © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 1 output ...
Page 41
... MPU RAM: The 71M6513 includes 2KB of static RAM memory on-chip (XRAM), which are backed-up by the battery plus 256- bytes of internal RAM in the MPU core. The 2KB of static RAM are used for data storage during normal MPU operations. ...
Page 42
... The oscillator drives a standard 32.768kHz watch crystal (see Figure 9). Crystals of this type are accurate and do not require a high current oscillator circuit. The oscillator in the 71M6513 Power Meter IC has been designed specifically to handle watch crystals and is compatible with their high impedance and limited power handling capability. The oscillator power dissipation is very low to maximize the lifetime of any battery backup device attached to the VBAT pin ...
Page 43
... The 71M6513 contains 24 dedicated LCD segment drivers and 18 multi-purpose pins which may be configured as additional LCD segment drivers (see I/O RAM register LCD_NUM). The 71M6513/6513H is capable of driving between 96 to 168 pixels of LCD display with 25% duty cycle. At seven segments per digit, the LCD can be designed for digits for display. ...
Page 44
... A Maxim Integrated Products Brand UART (UART0) and Optical Port (UART1) The 71M6513/6513H includes an interface to implement optical port. The pin OPT_TX is designed to directly drive an external LED for transmitting data on an optical link (low-active). The pin OPT_RX, also low-active, is designed to sense the input from an external photo detector used as the receiver for the optical link ...
Page 45
... The bits in EECTRL are shown in Table 56. The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly. However, controlling DIO4 and DIO5 directly is discouraged, because it may tie up the MPU to the point where it may become too busy to process interrupts. 71M6513/71M6513H 3-Phase Energy Meter IC V1 V3P3 ...
Page 46
... R 1 RX_ACK 4 TX_ACK CMD[3:0] Page 104 71M6513/71M6513H 3-Phase Energy Meter interface. Polarity Description Positive 1 when an illegal command is received. Positive 1 when serial data bus is busy. Negative 0 indicates that the EEPROM sent an ACK bit. Negative 0 indicates when an ACK bit has been sent to the EEPROM ...
Page 47
... Internal Voltages (VBIAS, VBAT, V2P5) The 71M6513 requires two supply voltages, V3P3A, for the analog section, and V3P3D, for the digital section. Both voltages can be tied together outside the chip. The internal supply voltage V2P5 is generated by a regulator from the 3.3V supplies. ...
Page 48
... SFR pulse can be inverted with SSI_FPOL (SSI_FPOL = 0 SRDY high-active). If SRDY does not delay it, the first SFR pulse in a frame will rise on the third SCLK after MUX_SYNC (or the fourth SCLK if 10MHz). MUX_SYNC can be used to synchronize the fields arriving at the data logger or DSP. Page 104 71M6513/71M6513H 3-Phase Energy Meter IC LCD Segment SSI Signal ...
Page 49
... Thus, simple RMS measurements are inherently inaccurate. A modern solid-state electricity meter IC such as the 71M6513/6513H functions by emulating the integral operation above, i.e. it processes current and voltage samples through an ADC at a constant frequency. As long as the ADC resolution is high enough and the sample frequency is beyond the harmonic range of interest, the current and voltage samples, multiplied with the time period of sampling will yield an accurate quantity for the momentary energy ...
Page 50
... ADC MUX Frame MUX_DIV Conversions (MUX_DIV=6 is shown ADC1 ADC2 ADC3 600 900 1200 INITIATED OPCODE AT END OF SUM INTERVAL © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 Settle ADC4 ADC5 1500 1800 MAX CK COUNT 140 BEGIN SSI TRANSFER ...
Page 51
... FLAG FLAG Figure 14: RTM Output Format If 16bit fields SSI_BEG Next field is delayed while SRDY is low © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 FLAG If 32bit fields If SSI_CKGATE = ...
Page 52
... Pre- Post- Processor Processor I/O RAM (Configuration RAM) Figure 17: MPU/CE Data Flow CE/MPU Communication ⋅ 2520 = = = ACC Hz 32768 f 2520 . © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 Processed Metering Data , the product of SUM_CYCLES and ACC = 999 . 75 ms ...
Page 53
... EXT_PULSE MPU DATA SAMPLES CE_BUSY CE XFER_BUSY INTERRUPTS Figure 18: MPU/CE Communication (Functional) FLASH CE_EN XFER Interrupt Fault, Reset, Power-Up © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 DISPLAY (me- mory-mapped LCD segments) SERIAL (UART0/1) EEPROM (I2C) DIO CE PRAM COMPUTATION ENGINE CE DRAM ...
Page 54
... A Maxim Integrated Products Brand Power-Up: After power-up, the 71M6513/6513H is in reset as long as V1 < VBIAS. As soon as V1 exceeds VBIAS, the reset timer is started which takes the MPU out of reset after 4100 oscillator cycles (see Figure 20). The MPU then initiates its pre- boot phase lasting 32 cycles. The supply current will be low but not zero during power-up. It will increase, once V1 exceeds VBIAS and will increase to the nominal value once the preboot phase starts ...
Page 55
... For the 71M6513, the temperature coefficients TC1 and TC2 are given as constants that represent typical component behavior. For the 71M6513H, the temperature characteristics of the chip are measured during production and then stored in the fuse registers TRIMBGA, TRIMBGB and TRIMM[2:0]. TC1 and TC2 can be derived from the fuses by using the relations given in the Electrical Specifications section ...
Page 56
... Figure 21: Chop Polarity w/ Automatic Chopping Accumulation Interval m+1 MUX alt. MUX cycle n cycle Re- Re- Positive Positive versed versed © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 Accumulation Interval m+2 MUX MUX cycle n cycle 1 Re- Re- Positive Positive versed versed Accumulation Interval m+2 alt ...
Page 57
... VMAX IMAX 66 . 1782 = Kh ⋅ ⋅ ⋅ WRATE N X ACC © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 Accumulation Interval m+2 alt. MUX MUX MUX cycle n cycle 2 cycle 3 cycle re- re- Positive Positive versed 01 11 (11) (11) (11 ...
Page 58
... Interface description). Additionally, by setting the I/O RAM register ECK_DIS to 1, the emulator clock is disabled, inhibiting access to the program with the emulator. See the cautionary note in the I/O RAM Register description! Page 104 71M6513/71M6513H 3-Phase Energy Meter IC Program Security © 2005-2011 Teridian Semiconductor Corporation ...
Page 59
... LCDZ 2030 LCD0 2031 LCD1 2032 LCD2 LCD3 2033 … … LCD39 2057 LCD40 2058 2059 LCD41 71M6513/71M6513H 3-Phase Energy Meter IC I/O RAM MAP – In Numerical Order Bit 5 Bit 4 Bit 3 Configuration: CE_EN SUM_CYCLES[5:0] CHOP_EN[1:0] RTM_EN COMP_INT[1:0] RESERVED CKOUT_DIS VREF_DIS ECK_DIS FIR_LEN ADC_DIS ...
Page 60
... INTBITS F8 INT6 WDI E8 WD_RST 94 ERASE FLSHCTL B2 PREBOOT SECURE PGADR B7 9E EEDATA 9F EECTRL Page 104 71M6513/71M6513H 3-Phase Energy Meter IC Bit 5 Bit 4 Bit 3 RTM Probes: RTM0[7:0] RTM1[7:0] RTM2[7:0] RTM3[7:0] Synchronous Serial Interface: SSI_CKGATE SSI_FSIZE[1:0] SSI_BEG[7:0] SSI_END[7:0] Fuse Selection Registers: TRIMSEL[7:0] TRIM[7:0] Bit 5 ...
Page 61
... DIO5. Programs the direction of DIO pins 15 through 8. 1 indicates output. Ignored if the pin is not configured as I/O. Programs the direction of DIO pins 21 through 16. 1 indicates output. Ignored if the pin is not configured as I/O. © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 Multiple NONE -- ...
Page 62
... R/W FLSH_ERASE SFR 94 W SFR B2[1] W FLSH_MEEN Page 104 71M6513/71M6513H 3-Phase Energy Meter IC Description Port 0 The value on the DIO pins. Pins configured Port 1 as LCD will read zero. When written, Port 2 changes data on pins configured as out- puts. Pins configured as LCD or input will ignore writes ...
Page 63
... LCD_EN 2022[4:0] R/W LCD_FS[4:0] 2021[4:2] R/W LCD_MODE[2:0] 71M6513/71M6513H 3-Phase Energy Meter IC Description Flash Page Erase Address FLSH_PGADR[6:0] – Flash Page Address (page 0 thru 127) that will be erased during the Page Erase cycle. (default = 0x00). Must be re-written for each new Page Erase cycle. Program Write Enable 0 – ...
Page 64
... The number of states in the input multiplexer states states states states MUX_SYNC enable. When high, converts SEG7 into a MUX_SYNC output. Tristates the OPT_TX output. R Indicates that the preboot sequence is active. © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEG DIO DIO4-21 DIO4-20 DIO4-19 ...
Page 65
... SSI_FPOL 2070[1] R/W SSI_RDYEN 2070[0] R/W SSI_RDYPOL 71M6513/71M6513H 3-Phase Energy Meter IC Description Together w/ SUM_CYCLES, this value determines the number of samples in one sum cycle between XFER interrupts for the CE. Number of samples = PRE_SAMPS*SUM_CYCLES. 00-42, 01-50, 10-84, 11-100 The RTC interface. These are the ‘year’, ‘month’, ‘day’, ‘hour’, ‘minute’ and ‘ ...
Page 66
... VBAT pin and at boot-up will indicate if the part is recovering from a WD overflow or a power fault. This bit should be cleared by the MPU on boot-up also automatically cleared when RESETZ is low. © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 ...
Page 67
... ADC conversion and the number of conversions per cycle must be 12 (allowing for one settling cycle). The default configuration is FIR_LEN = 0 (two cycles per conversion) and MUX_DIV = 0 (6 conversions per mux cycle). 71M6513/71M6513H 3-Phase Energy Meter IC CE Program and Environment -9 V ...
Page 68
... Delta) 4 VA*(IA-IB)/2 + VB*(IC-IB)/2 (2 element, 4W 3φ Wye) 5 VA*IA + VB*IB + VC*IC (3 element, 4W 3φ Wye) CE RAM Locations The information given in the following tables apply to CE code Version CE13B09D. Page 104 71M6513/71M6513H 3-Phase Energy Meter IC Element Input Mapping W0SUM/ W1SUM/ VAR0SUM VAR1SUM VA*IA - VA*(IA-IB)/2 ...
Page 69
... VA Phase A voltage 0x02 IB Phase B current 0x03 VB Phase B voltage 0x04 IC Phase C current 0x05 VC Phase C voltage 0x06 TEMP Temperature V3 monitor/comparator 0x07 V3 input Description See description of CE status word below © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 Page 104 ...
Page 70
... IxSQSUM_X and VxSQSUM are the squared current and voltage samples acquired during the last accumulation interval. INSQSUM_X can be used for computing the neutral current. Page 104 71M6513/71M6513H 3-Phase Energy Meter IC Description Meter voltage inputs must be above this threshold to prevent sag alarms. ...
Page 71
... IMAX / In_8 VMAX V h -13 2 VMAX V ⋅ F VxSQSUM = S Vx RMS N © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 − ⋅ 6 587 - 9.4045*10 IMAX I h ⋅ ⋅ ⋅ LSB 3600 F S ACC Page 104 ...
Page 72
... Temperature Measurement and Temperature Compensation Input variables: TEMP_NOM is the reference value for temperature measurement, i.e. when this value is set with TEMP_RAW_X at known temperature. The 71M6513/6513H measures temperature with reference to this value. DEGSCALE is the slope or rate of temperature increase or decrease from the TEMP_NOM for TEMP_X measurement. ...
Page 73
... Filtered, unscaled reading from temperature sensor. This value should be written to TEMP_NOM during meter calibration. Scales all voltage and current inputs. 16384 provides unity gain. Default is 16384. If EXT_TMP = 0, GAIN_ADJ is updated by the CE. © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 *(TEMP_RAW_X-TEMP_NOM). ...
Page 74
... X WRATE WSUM = RATE 46 2 Where F = 2520.6Hz (sampling frequency), and X = pulse speed factor derived from CE variables PULSE_SLOW and S PULSE_FAST (see table below). Page 104 71M6513/71M6513H 3-Phase Energy Meter IC ⋅ © 2005-2011 Teridian Semiconductor Corporation DATA SHEET AUGUST 2011 ...
Page 75
... DIO_PV bit). The output pulse rate is: -32 0 APULSER * WRATE * 2 S This input is buffered and can be updated by the MPU during a computation interval. The change will take effect at the beginning of the next interval. © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 PULSE_SLOW PULSE_FAST - ...
Page 76
... PHADJ 1241 During calibration, the value of TEMP_RAW_X should be placed in N/A TEMP_NOM. © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET 14 = 16384. The gain of each channel is directly 15 – desired to delay the current by the ⋅ Φ 02229 TAN at 60Hz − ...
Page 77
... Offset for low-current measurement on V3. 0 -13 LSB = = 9.4045*10 IMAX Wh Accuracy at Room Temperature Figure 24: Wh Accuracy, 0.3A - 200A/240V VARh Accuracy at Room Temperature © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 - and )*1.04173*10 ...
Page 78
... Harmonic Data - Test performed at current distortion amplitude of 40% and voltage distortion amplitude of 10% as per IEC 62053, part 22. Figure 26: Meter Accuracy over Harmonics at 240V, 30A Page 104 71M6513/71M6513H 3-Phase Energy Meter 0 100 A ...
Page 79
... The first process applied to the 71M6513H is the trimming of the reference voltage, which is guaranteed to have accuracy over temperature of better that ±10PPM/°C. The second process applied to the 71M6513H is the characterization of the reference voltage over temperature. The coefficients for the reference voltage are stored in so-called trim fuses (I/O RAM registers TRIMBGA, TRIMBGB, TRIMM[2:0] ...
Page 80
... It is not recommended to measure crystal frequency directly due to the error introduced by the measurement probes. A practical method to measure the crystal frequency (when installed on the PCB with the 71M6513 have a DIO pin toggle every second, based on the RTC interrupt, with all other interrupts disabled. When this signal is measured with a precision timer, the crystal frequency can be obtained from the measured time period t (in µ ...
Page 81
... MAIN_EDGE_X address. This count is equivalent to twice the line frequency, and can be used to synchronize and/or correct the RTC production electricity meter, the 71M6513 or 71M6513H is not the only component contributing to temperature de- pendency. In fact, a whole range of components (e.g. current transformers, resistor dividers, power sources, filter capacitors) will exhibit slight or pronounced temperature effects ...
Page 82
... PPM/°C and PPM/°C PPMC2 = 1374*TC2/1.195). Close examination of the electrical specification (see Table 62) for the 71M6513 reveals that the achievable deviation is not strictly ±40 PPM/°C over the whole temperature range: Only for temperatures for which T-22 > 40 (i.e. T > 62°C) or for which T-22 < ...
Page 83
... Error Band (PPM) over Temperature (°C) ±40 PPM/°C ±40 PPM/°C - Error Band (PPM) over Temperature (°C) +10 PPM/°C -10 PPM/°C - Crystal Oscillator © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 Page 104 ...
Page 84
... VLCD pin of the 71M6513. The LCD drivers are enabled with the I/O register LCD_ON; I/O register LCD_FS is used to adjust contrast, and LCD_MODE selects the operation mode (LCD type). ...
Page 85
... DIO pins DIO4 and DIO5 to I2C pins SCL and SDA. In general, all pins of the 71M6513 are compatible with external 5V devices. The exceptions are the power supply pins and the RX pin of the UART (see section Electrical Specifications). ...
Page 86
... A Maxim Integrated Products Brand R1 = 100kΩ Figure 36 shows how a 5V signal from an external device can be safely interfaced to the RX pin. Page 104 3-Phase Energy Meter IC V3P3 71M651X RX Figure 36: Interfacing 0-5V Signal © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 ...
Page 87
... For proper debugging or loading code into the 71M6513 mounted on a PCB necessary to have a provision like the header shown above R1 in Figure 38. A shorting jumper on this header pulls V3P3 disabling the hardware watchdog timer. ...
Page 88
... TEMP samples for temperature compensation, especially with the 71M6513H devices. Many meter manufacturers assemble the meter PCB with the 71M6513 IC and the other electronic components first and then join the meter PCB with the meter enclosure, sensors and other main components separately at a later production step. ...
Page 89
... All application-specific MPU functions mentioned above under “Application Information” are available from Teridian as a standard ANSI C library and as ANSI “C” source code. The code is available as part of the Demonstration Kit for the 71M6513 and 71M6513H ICs. The Demonstration Kits come with the 71M6513 or 71M6513H IC preprogrammed with demo firmware mounted on a functional sample meter PCB (Demo Board) ...
Page 90
... Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GNDA. Page 104 71M6513/71M6513H 3-Phase Energy Meter IC Electrical Specifications © 2005-2011 Teridian Semiconductor Corporation ...
Page 91
... Digital low-level output voltage V OL Input pull-up current RESETZ ....................................... Other digital inputs Input pull down current TEST Other digital inputs 1 Guaranteed by design; not production tested. 71M6513/71M6513H 3-Phase Energy Meter IC CONDITION MIN Normal Operation Battery Backup No Battery Battery Backup CONDITION MIN −0.3 V3P3D I ...
Page 92
... CKMPU=38.4kHz Normal Operation as above, except write Flash at maximum rate. ≤25°C Battery backup, V3P3A=V3P3D=VLCD= 32kHz 85°C OSC CONDITION Reduce V3P3 until V2P5 drops 200mV RESETZ=1, iload=0 © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 MIN TYP MAX UNIT 6.4 9.5 mA 3.7 4.3 mA 2.5 4.8 mA ...
Page 93
... Ta = -40ºC to +85º 25º 25º -40ºC to 85º 1mA, -1mA LOAD CONDITION Crystal connected © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 MIN TYP MAX UNIT 1.193 1.195 1.197 40 2.5 2 TC2 µV/°C µ ...
Page 94
... SOURCE I =20mA SINK |Vin|≤300mV CONDITION T =25ºC, T =75º Nominal relationship: N(T -40ºC to +85ºC A © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 MIN TYP MAX UNIT mV -250 250 peak μV -10 10 -75 dB -90 dB kΩ ...
Page 95
... VLC0 Voltage, 1/3 bias ½ bias Output Impedance RTC PARAMETER Range for date RESETZ PARAMETER Reset pulse width Reset pulse fall time 1 Guaranteed by design; not production tested. 71M6513/71M6513H 3-Phase Energy Meter IC CONDITION MIN Vol=1.5V 1.2 Voh=1.5V 1.2 4.5 VLCD=5.0V, LCD_FS =1F, LCD_MODE =0,1,2,3 LCD_BSTEN ...
Page 96
... Flash byte writes between page or mass erase operations FLASH MEMORY TIMING PARAMETER Write Time per Byte Page Erase (512 bytes) Mass Erase EEPROM INTERFACE PARAMETER Write Clock frequency Page 104 71M6513/71M6513H 3-Phase Energy Meter IC CONDITION MIN -20 -20 -20 0.8 Vin = VBIAS - 100mV 0.8 0.8 +100mV overdrive 0 ...
Page 97
... Bypass capacitor for V1 Bypass capacitor for VBIAS Boost charging capacitor Boost bypass capacitor Bypass capacitor for V2P5 Resistor for TEST © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 VALUE UNIT ≥0.1±20% µF ≥0.1±20% µ ...
Page 98
... A Maxim Integrated Products Brand 100-Pin LQFP PACKAGE OUTLINE (Bottom View) 1 0.60(0.024) TYP. Notes: Controlling dimensions are in mm. Page 104 71M6513/71M6513H 3-Phase Energy Meter IC Packaging Information 15.7(0.618) 16.3(0.641) Top View 13.8(0.543) 14.2(0.559) 1.40(0.055) 1.60(0.063) 0.18(0.007) 0.27(0.011) 0.50(0.0197)TYP. Side View © 2005-2011 Teridian Semiconductor Corporation ...
Page 99
... E_TBUS[3] 12 E_TBUS[2] 13 E_TBUS[1] 14 E_TBUS[0] 15 SEG37/DIO17 16 SEG38/DIO18 17 DIO_0 18 DIO_1 19 DIO_2 20 DIO_3 21 COM0 22 COM1 23 COM2 24 COM3 25 71M6513/71M6513H 3-Phase Energy Meter IC © 2005-2011 Teridian Semiconductor Corporation DATA SHEET SEPTEMBER 2011 GNDD 75 74 RESETZ 73 V2P5 VBAT SEG31/DIO11 SEG30/DIO10 69 SEG29/DIO9 68 SEG28/DIO8 67 SEG41/DIO21 66 SEG40/DIO20 65 64 ...
Page 100
... Voltage Reference for the ADC. A 0.1µF capacitor to GNDA should be connected to this pin. Crystal Inputs: A 32kHz style crystal should be connected across these pins. Typically, a 22-27pF capacitor is also connected from each pin to GNDA. See crystal manufacturer datasheet for details. Voltage boost output. © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET AUGUST 2011 ...
Page 101
... Emulator clock. This pin has an internal pull-up resistor Emulator reset. This pin has an internal pull-up resistor. 7 For Teridian internal use. Must be connected to GNDD via a 10kΩ resistor. © 2005-2011 Teridian Semiconductor Corporation 71M6513/71M6513H DATA SHEET SEPTEMBER 2011 Page: 101 of 104 ...
Page 102
... CMOS Output Output Pin GNDD GNDD Digital Output Equivalent Circuit Type 4: Standard Digital Output or pin configured as DIO Output Page: 102 of 104 71M6513/71M6513H 3-Phase Energy Meter IC LCD SEG LCD Output Driver Pin GNDD LCD Output Equivalent Circuit Type 5: LCD SEG or pin configured as LCD SEG ...
Page 103
... Description default value, APULSER and APULSEW MUX_DIV . Added notes and clarifications on flash and bits. Added requirements for termination ECK_DIS SECURE © 2005-2011 Teridian Semiconductor Corporation DATA SHEET SEPTEMBER 2011 PACKAGE MARKING 71M6513-IGT 71M6513-IGT 71M6513H-IGT 71M6513H-IGT update by MPU, relation Page: 103 of 104 ...
Page 104
... Explanation of scaling factors applied to PPMC and PPMC2 (page 73). 3 9/11 - Explanation of error bands for temperature compensation (page 82). - Precautionary notes regarding the voltage range of the V3 pin (page 88). - Precautionary notes for connecting a battery (page 88). Page: 104 of 104 71M6513/71M6513H 3-Phase Energy Meter IC Description © 2005-2011 Teridian Semiconductor Corporation DATA SHEET AUGUST 2011 rd ...