ADV7162KS170 Analog Devices Inc, ADV7162KS170 Datasheet - Page 34

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ADV7162KS170

Manufacturer Part Number
ADV7162KS170
Description
IC DAC VIDEO COLOR 96BIT 160MQFP
Manufacturer
Analog Devices Inc
Type
Video DACr
Datasheet

Specifications of ADV7162KS170

Rohs Status
RoHS non-compliant
Applications
HDTV
Mounting Type
Surface Mount
Package / Case
160-MQFP, 160-PQFP

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ADV7160/ADV7162
The ADV7160/ADV7162 is a highly integrated circuit contain-
ing both precision analog and high speed digital circuitry. It has
been designed to minimize interference effects on the integrity
of the analog circuitry by the high speed digital circuitry. It is
imperative that these same design and layout techniques be ap-
plied to the system level design such that high speed, accurate
performance is achieved. The “Recommended Analog Circuit
Layout” shows the analog interface between the device and
monitor.
The layout should be optimized for lowest noise on the
ADV7160/ADV7162 power and ground lines by shielding the
digital inputs and providing good decoupling. The lead length
between groups of V
as to minimize inductive ringing.
Ground Planes
The ground plane should encompass all ADV7160/ADV7162
ground pins, voltage reference circuitry, power supply bypass
circuitry for the ADV7160/ADV7162, the analog output traces,
and all the digital signal traces leading up to the ADV7160/
ADV7162. The ground plane is the graphics board's common
ground plane.
Power Planes
The ADV7160/ADV7162 and any associated analog circuitry
should have it’s own power plane, referred to as the analog
power plane (V
the regular PCB power plane (V
ferrite bead. This bead should be located within three inches of
the ADV7160/ADV7162.
The PCB power plane should provide power to all digital logic
on the PC board, and the analog power plane should provide
power to all ADV7160/ADV7162 power pins and voltage refer-
ence circuitry.
Plane-to-plane noise coupling can be reduced by ensuring that
portions of the regular PCB power and ground planes do not
overlay portions of the analog power plane, unless they can be
arranged such that the plane-to-plane noise is common mode.
Supply Decoupling
For optimum performance, bypass capacitors should be in-
stalled using the shortest leads possible, consistent with reliable
AA
). This power plane should be connected to
AA
and GND pins should by minimized so
CC
) at a single point through a
BOARD DESIGN AND LAYOUT CONSIDERATIONS
APPENDIX 1
–34–
operation, to reduce the lead inductance. Best performance is
obtained with 0.1 F ceramic capacitor decoupling. Each group
of V
0.1 F decoupling capacitor to GND. These capacitors should
be placed as close as possible to the device.
It is important to note that while the ADV7160/ADV7162 con-
tains circuitry to reject power supply noise, this rejection de-
creases with frequency. If a high frequency switching power
supply is used, the designer should pay close attention to reduc-
ing power supply noise and consider using a three terminal volt-
age regulator for supplying power to the analog power plane.
Digital Signal Interconnect
The digital inputs to the ADV7160/ADV7162 should be iso-
lated as much as possible from the analog outputs and other
analog circuitry. Also, these input signals should not overlay the
analog power plane.
Due to the high clock rates involved, long clock lines to the
ADV7160/ADV7162 should be avoided to reduce noise pickup.
Any active termination resistors for the digital inputs should be
connected to the regular PCB power plane (V
analog power plane.
Analog Signal Interconnect
The ADV7160/ADV7162 should be located as close as possible
to the output connectors to minimize noise pickup and reflec-
tions due to impedance mismatch.
The video output signals should overlay the ground plane, and
not the analog power plane, to maximize the high frequency
power supply rejection.
Digital Inputs, especially Pixel Data Inputs and clocking signals
(CLOCK, LOADOUT, LOADIN, etc.) should never overlay
any of the analog signal circuitry and should be kept as far away
as possible.
For best performance, the analog outputs (IOR, IOG, IOB)
should each have a 75
These resistors should be placed as close as possible to the
ADV7160/ADV7162 so as to minimize reflections.
AA
pins on the ADV7160/ADV7162 must have at least one
load resistor connected to GND.
CC
), and not the
REV. 0

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