MAX9160 Maxim, MAX9160 Datasheet
MAX9160
Available stocks
Related parts for MAX9160
MAX9160 Summary of contents
Page 1
... The LVTTL/LVCMOS outputs feature 200ps maximum output-to-output skew and ±100ps maxi- mum added peak-to-peak jitter. The MAX9160 is designed to operate with a 3.3V sup- ply voltage over the extended temperature range of -40°C to +85°C. This device is available in 28-pin exposed- and nonexposed-pad TSSOP and 32-lead 5mm x 5mm QFN packages ...
Page 2
... Note 1: Short one output at a time. Do not exceed the absolute maximum junction temperature. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
Page 3
... Added Peak-to-Peak Output Jitter Output Duty Cycle Outp ut- to- Outp ut S kew ( N ote 9) Part-to-Part Skew (Note 10) Part-to-Part Skew (Note 11) Maximum Switching Frequency (Note 12) Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground except and V ...
Page 4
... SKPP1 rated conditions. Note 11 the greatest difference in propagation delay between different parts operating within rated conditions. SKPP2 Note 12: All AC specifications met at f MAX (MAX9160 with RSET = 12kΩ ±1 3.3V unless otherwise noted.) DIFFERENTIAL PROPAGATION DELAY vs. TEMPERATURE 7.2 6.7 ...
Page 5
... LVTTL/LVCMOS Output Clock Driver (MAX9160 with RSET = 12kΩ ±1 unless otherwise noted.) SINGLE-ENDED PROPAGATION DELAY vs. SUPPLY VOLTAGE 4.0 3.5 t PHL 3.0 t 2.5 PLH 2.0 1.5 1.0 0.5 0 3.0 3.1 3.2 3.3 3.4 3.5 SUPPLY VOLTAGE (V) OUTPUT VOLTAGE LOW vs. TEMPERATURE 0.30 0.25 0.20 0.15 0.10 0. 4mA LOAD 0 -40 -30 -20 - TEMPERATURE (°C) SUPPLY CURRENT vs. FREQUENCY ...
Page 6
... LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver (MAX9160 with RSET = 12kΩ ±1 3.3V unless otherwise noted.) TRANSITION TIME vs. SUPPLY VOLTAGE 3.0 t 2 1.5 1.0 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V) PIN QFN TSSOP 12, 16, 6, 17 13, 7, 10, 20, 26 19, 25 ...
Page 7
... The LVTTL/LVCMOS outputs feature 200ps maximum output-to-output skew and ±100ps maximum added peak-to-peak jitter. The MAX9160 is designed to operate with a 3.3V sup- ply voltage over the extended temperature range of _______________________________________________________________________________________ LVDS or LVTTL/LVCMOS Input to ...
Page 8
... CC OUT_ Figure 3. Transition Time and Propagation Delay Timing Diagram Propagation Delay and RSET The MAX9160 delay can be adjusted by connecting a resistor from RSET to ground. See Typical Operating Characteristics for a graph of delay vs. RSET. Each bank of seven LVTTL/LVCMOS drivers is con- trolled by an output enable. Outputs follow the selected input when EN_ is high ...
Page 9
LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver ENA SEL RSET IN+ DELAY IN- MUX SE_IN ENB _______________________________________________________________________________________ Functional Diagram V CC OUTA[0: OUTB[0:6] 9 ...
Page 10
... TOP VIEW SEL SE_IN V CC GND IN+ IN- GND RSET 10 ______________________________________________________________________________________ CARD 2 ASIC 14 FPGA MAX9160 BACKPLANE Pin Configurations (continued MAX9160 QFN Typical Application Circuit FPGA 14 14 MAX9160 OUTA2 23 OUTA1 OUTA0 20 OUTB6 19 GND 18 OUTB5 17 OUTB4 ...
Page 11
... LVTTL/LVCMOS Output Clock Driver (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) ______________________________________________________________________________________ LVDS or LVTTL/LVCMOS Input to Package Information 11 ...
Page 12
... LVDS or LVTTL/LVCMOS Input to 14 LVTTL/LVCMOS Output Clock Driver (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) 12 ______________________________________________________________________________________ Package Information (continued) ...
Page 13
... For the latest package outline information www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...