MAX9160 Maxim, MAX9160 Datasheet - Page 7

• Manufacturer Part Number: MAX9160
• Description: The MAX9160 125MHz, 14-port LVTTL/LVCMOS clock driver repeats the selected LVDS or LVTTL/LVCMOS input on two output banks
• Manufacturer: Maxim

Figure 1. Fail-Safe Input Circuit
*MAX9160EGJ and MAX9160AEUI.
The MAX9160 125MHz, 14-port LVTTL/LVCMOS clock
driver repeats the selected LVDS or LVTTL/LVCMOS
input on two output banks. Each bank consists of seven
LVTTL/LVCMOS series terminated outputs and a bank
enable. The LVDS input has a fail-safe function. The
MAX9160 has a propagation delay that can be adjusted
using an external resistor to set the bias current for an
internal delay cell. The LVTTL/LVCMOS outputs feature
200ps maximum output-to-output skew and ±100ps
maximum added peak-to-peak jitter.
The MAX9160 is designed to operate with a 3.3V sup-
ply voltage over the extended temperature range of
21, 23, 24, 26,
27, 30, 31
QFN
EP*
32
IN+
IN-
R
R
IN1
IN1
PIN
R
IN2
1, 2, 22, 24, 25,
V
_______________________________________________________________________________________
CC
TSSOP
27, 28
V
14 LVTTL/LVCMOS Output Clock Driver
Detailed Description
CC
3
- 0.3V
COMPARATOR
FAIL-SAFE
Exposed
OUTA_
NAME
ENA
Pad
LVDS or LVTTL/LVCMOS Input to
TO INPUT
Bank A LVCMOS/LVTTL Outputs
LVCMOS/LVTTL Level Logic Input. When ENA = high, outputs OUTA_ are
enabled and follow the selected input. When ENA = low or open, outputs
OUTA_ are driven low. ENA is pulled to GND by an internal resistor.
Solder to PC board
MUX
-40°C to +85°C. This device is available in 28-pin
exposed and nonexposed pad TSSOP and 32-lead
5mm x 5mm QFN packages.
A fail-safe circuit on the MAX9160 sets enabled outputs
high when the LVDS input is:
• Open
• Undriven and shorted
• Undriven and terminated
Without a fail-safe circuit, when the LVDS input is
selected and undriven, noise may cause the enabled
outputs to switch. Open or undriven terminated input
conditions can occur when a cable is disconnected or
cut, or when a driver output is in high impedance. A
shorted input can occur because of a cable failure.
When the MAX9160 LVDS input is driven with a differ-
ential signal with a common-mode voltage between
IV
vated. If the input is open, undriven and shorted, or
undriven and parallel terminated, an internal resistor in
the fail-safe circuit pulls both of the LVDS inputs above
V
the output high
Figure 2. Output Load
CC
ID
/2I and 2.4V - IV
- 0.3V, activating the fail-safe circuit and forcing
Pin Description (continued)
FUNCTION
(Figure 1).
OUT_
ID
/2I, the fail-safe circuit is not acti-
C
L
Fail-Safe
7