AD9889KSTZ-80 Analog Devices Inc, AD9889KSTZ-80 Datasheet
AD9889KSTZ-80
Specifications of AD9889KSTZ-80
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AD9889KSTZ-80 Summary of contents
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FEATURES HDMI/DVI transmitter compatible with HDMI 1.1 and HDCP 1.1 Single 1.8 V power supply Video/audio inputs are 3.3 V tolerant 80-lead, Pb-free LQFP Digital video 80 MHz operation supports all video formats from 480i to 1080i and 720p Programmable ...
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AD9889 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Evaluation Kits and Other Resources ............................................ 1 Revision History ............................................................................... 2 Electrical Specifications ................................................................... 3 Absolute Maximum Ratings............................................................ 5 Explanation of Test ...
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... VI 25°C IV Full VI 25°C IV 13.5 25°C VI 40% Full VI VI TBD VI TBD VII 800 VI VI 25°C VI 25°C VI 25°C VII 75 25°C VII 75 Rev Page AD9889 AD9889KSTZ-80 Typ Max Unit V 0.7 V −1 °C/W 30 °C °C +10 μA −0 μA 1 ...
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... AD9889 Parameter AUDIO AC TIMING 2 Sample Rate (I S and S/PDIF Cycle Time Setup Time Hold Time Audio Pipeline Delay Temp Test Level Min Full IV 32 25°C IV 25°C IV 25°C IV 25°C IV Rev Page AD9889KSTZ-80 Typ Max Unit 192 kHz ...
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ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Digital Inputs Digital Output Current Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Maximum Case Temperature ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on ...
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AD9889 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS HSYNC 4 VSYNC 5 CLK 6 S/PDIF 7 MCLK SCLK ...
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Pin Type Pin No. Mnemonic POWER SUPPLY 24, 29, 36 61, 62, 63 16, 19, 20 GND 15, 17, 18, 22, 26, 32, 39, 42, 43, 59, 60, 79, 80 CONTROL 47 SDA ...
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AD9889 Pin Mnemonic Description POWER SUPPLY DV Main Power Supply. These pins supply power to the main elements of the circuit. They should be filtered and as DD quiet as possible. AV Output Power Supply DD PV Clock Generator Power ...
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DESIGN GUIDE GENERAL DESCRIPTION The AD9889 HDMI transmitter provides a high bandwidth digital content protected (HDCP) digital link between a wide range of digital input formats—both audio and video (see Table 8) and output formats (see Table 9). Video and ...
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AD9889 Normal 4:4:4 Input Format (RGB or YCbCr) Input input format of RGB 4:4:4 or YCbCr 4:4:4 can be selected by setting the input ID (R0x15[3:1]) to 0b000. The input color space (CS) must be selected ...
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YCbCr 4:2:2 Formats (24 Bits, 20 Bits Bits) with Embedded Syncs, Input input with YCbCr 4:2:2 with embedded syncs can be selected by setting the input ID (R0x15[3:1]) to 0b010. HS YNC and VSYNC ...
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AD9889 YCbCr 4:2:2 DDR (Double Data Rate) Formats (12 Bits, 10 Bits Bits) with Embedded Syncs. Input input with YCbCr 4:2:2 DDR data and embedded syncs (ITU 656) can be selected by setting the ...
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YCbCr 4:2:2 Formats (24, 20 bits) DDR with Separate Sync, Input input format of YCbCr 4:2:2 DDR can be selected by setting the input ID (R0x15[3:1]) to 0b110. The three different input pin assignment ...
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AD9889 4:2:2 TO 4:4:4 DATA CONVERSION The AD9889 has the ability to convert YCbCr video from 4:4:4 to 4:2:2 and 4:2:2 to 4:4:4. To convert from 4:4:4 to 4:2:2, the video data goes through a filter first to remove any ...
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EAV b a HSYNC a: HSYNC PLACEMENT R0x30, R0x31[7:6] b: HSYNC DURATION R0x31[5:0], R0x32[7:4] EAV VSYNC a a: VSYNC PLACEMENT R0x32[3:0], R0x33[7:2] b: VSYNC DURATION R0x33[1:0], R0x34 a1[12:0] 1 × R [11:0] × IN 4096 a2[12:0] 1 × B [11:0] ...
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AD9889 COLOR SPACE CONVERSION MATRIX (CSC) The color space conversion matrix in the AD9889 consists of three identical processing channels. In each channel, three input values are multiplied by three separate coefficients. Also included are an offset value for each ...
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AUDIO DATA CAPTURE The AD9889 is capable of receiving audio data in either I S/PDIF format for packetization and transmission over the HDMI interface AUDIO The AD9889 can accommodate from two to eight channels of I audio ...
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AD9889 N PARAMETER N shall be an integer number that meets the following restriction: 128 × fs/1500 Hz ≤ N ≤ 128 × fs/300 Hz with a recommended optimal value of 128 × fs/1000 Hz equals N. For coherent audio ...
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The AD9889 has two modes for CTS generation: manual mode and auto mode. In manual mode, the user can program the CTS number directly into the chip (R0x07 to R0x09) and select this external mode by setting R0x0A[ ...
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AD9889 HDCP HANDLING The AD9889 has a built-in microcontroller to handle HDCP transmitter states, including handling downstream HDCP repeaters. To activate HDCP from a system level, the main controller needs to set R0xAF[ inform AD9889 that the ...
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SERIAL REGISTER MAP The AD9889 is initialized and controlled by a set of registers that determine the operating modes. An external controller is employed to write and read the control registers through the two-line serial interface port. Table 22. ...
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AD9889 Hex Read/Write or Read Address Only Bits 0x0B Read/Write [6] [5] [4:0] 0x0C Read/Write [5:2] [1:0] 0x0D Read/Write [4:0] 0x0E Read/Write [5:3] [2:0] 0x0F Read/Write [5:3] [2:0] 0x10 Read/Write [5:3] [2:0] 0x11 Read/Write [5:3] [2:0] 0x12 Read/Write [5] [4:2] ...
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Hex Read/Write or Read Address Only Bits 0x14 Read/Write [7:4] [3:0] 0x15 Read/Write [7:4] [3:1] [0] 0x16 Read/Write [7:6] [5:4] [3:2] Default Value Register Name 0000**** Source Number ****0000 Word Length 2 0000**** I S_SF ****000* VFE_input_id *******0 low_frq_video 00****** ...
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AD9889 Hex Read/Write or Read Address Only Bits [1] [0] 0x17 Read/Write [7] [6] [5] [4:3] [2] [1] [0] 0x18 Read/Write [4:0] 0x19 Read/Write [7:0] 0x1A Read/Write [4:0] 0x1B Read/Write [7:0] 0x1C Read/Write [4:0] 0x1D Read/Write [7:0] 0x1E Read/Write [4:0] ...
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Hex Read/Write or Read Address Only Bits 0x1F Read/Write [7:0] 0x20 Read/Write [4:0] 0x21 Read/Write [7:0] 0x22 Read/Write [4:0] 0x23 Read/Write [7:0] 0x24 Read/Write [4:0] 0x25 Read/Write [7:0] 0x26 Read/Write [4:0] 0x27 Read/Write [7:0] 0x28 Read/Write [4:0] 0x29 Read/Write [7:0] ...
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AD9889 Hex Read/Write or Read Address Only Bits 0x36 Read/Write [7:6] [5:0] 0x37 Read/Write [7:5] [4:0] 0x38 Read/Write [7:1] 0x39 Read/Write [7:0] 0x3A Read/Write [7:4] 0x3B Read/Write [7] [6:5] [4:3] [2:1] [0] 0x3C Read/Write [5:0] 0x3D Read [7:6] [5:0] 0x3E ...
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Hex Read/Write or Read Address Only Bits 0x40 Read/Write [7] [6] [5] [4] [3] 0x41 Read/Write [6] [5] [4] [3] 0x42 Read [7] [6] [5] 0x43 Read/Write [7:0] 0x44 Read/Write [7] [6] [5] [4] [3] 0x45 Read/Write [7] [6] [5:4] ...
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AD9889 Hex Read/Write or Read Address Only Bits [5:4] [3:2] [1:0] 0x47 Read/Write [7:4] 0x48 Read/Write [7:0] 0x49 Read/Write [7:0] 0x4A Read/Write [7:0] 0x4B Read/Write [7:0] 0x4C Read/Write [7:0] 0x4D Read/Write [7:0] 0x4E Read/Write [7:0] 0x4F Read/Write [7:0] 0x50 Read/Write ...
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Hex Read/Write or Read Address Only Bits 0x52 Read/Write [7:0] 0x53 Read/Write [7:0] 0x54 Read/Write [7:0] 0x55 Read/Write [7:0] 0x56 Read/Write [7:0] 0x57 Read/Write [7:0] 0x58 Read/Write [7:0] 0x59 Read/Write [7:0] 0x5A Read/Write [7:0] 0x5B Read/Write [7:0] 0x5C Read/Write [7:0] ...
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AD9889 Hex Read/Write or Read Address Only Bits 0x72 Read/Write [7:0] 0x73 Read/Write [7] [6] [5:3] 0x74 Read/Write [7:0] 0x75 Read/Write [7:0] 0x76 Read/Write [7:0] 0x77 Read/Write [7:0] 0x78 Read/Write [7:0] 0x79 Read/Write [7:0] 0x7A Read/Write [7:0] 0x7B Read/Write [7:0] ...
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Hex Read/Write or Read Address Only Bits 0x95 Read/Write [7:6] 0x96 Read/Write [7] [6] [5] [4] [3] [2] 0x97 Read/Write [7] [6] [2] 0x98 Read/Write [7] [3:0] 0x9C Read/Write [7:0] 0x9D Read/Write [3:0] 0xA2 Read/Write [7:0] 0xA3 Read/Write [7:0] 0xAF ...
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AD9889 Hex Read/Write or Read Address Only Bits 0xBE Read [7] [6] [5] [4] [3:2] [1] [0] 0xBF Read [7:0] 0xC0 Read [7:0] 0xC1 Read [7:0] 0xC2 Read [7:0] 0xC3 Read [7:0] 0xC4 Read/Write [7:0] 0xC5 Read [7] [6] [5] ...
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SERIAL CONTROL REGISTER DETAIL CHIP IDENTIFICATION 0x00—Bits[7:0] Chip Revision An 8-bit register that represents the silicon revision. 0x01—Bits[3:0] N[19:16] These are the most significant four bits of a 20-bit word used along with the 20-bit CTS term in the ...
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AD9889 Table 23. Source of Subpacket Audio Field Code Channel ( and Left/Right 000 Channel 0 Left 001 Channel 0 Right 010 Channel 1 Left 011 Channel 1 Right 100 Channel 2 Left 101 Channel 2 Right 110 ...
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Table 24. VID Format Vertical Refresh 1 480p ~ 480p ~ 480p ~ 720p ~ 1080i ~ 480i ~ 480i ~ 240p ~60 Hz ...
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AD9889 0x50—Bits[7:5] audio_IF_cc 000 = refer to stream header 001 = 2 channels 010 = 3 channels … 111 = 8 channels 0x51—Bits[7:0] Speaker Mapping These bits define the suggested placement of speakers. Table 25. CA Bit 4 Bit 3 ...
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SOURCE PRODUCT DESCRIPTION (SPD) INFOFRAME 0x52—Bits[7:0] SPD_B1 This is the first character in eight (VN1-VN8) that is the name of the company that appears on the product. The data characters are 7-bit ASCII code. 0x53—Bits[7:0] SPD_B 2 (VN2) 0x54—Bits[7:0] SPD_B ...
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AD9889 0x84—Bits[7:0] ISRC2_PB0 This is transmitted only when the ISRC continue bit (Register 0x73 Bit 7) is set to 1. 0x85—Bits[7:0] ISRC2_PB1 0x86—Bits[7:0] ISRC2_PB2 0x87—Bits[7:0] ISRC2_PB3 0x88—Bits[7:0] ISRC2_PB4 0x89—Bits[7:0] ISRC2_PB5 0x8A—Bits[7:0] ISRC2_PB6 0x8B—Bits[7:0] ISRC2_PB7 0x8C—Bits[7:0] ISRC2_PB8 0x8D—Bits[7:0] ISRC2_PB9 0x8E—Bits[7:0] ISRC2_PB10 ...
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HDCP Controller Error When an error occurs in the HDCP flow reported here after setting the error flag (0xC5[7]). Table 28. Error Code Error Condition 0000 No error 0001 Bad receiver BKSV 0010 Ri mismatch 0011 Pj ...
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AD9889 2-WIRE SERIAL CONTROL PORT A 2-wire serial interface is provided two AD9889 devices can be connected to the 2-wire serial interface, with each device having a unique address. The 2-wire serial interface comprises a clock (SCL) and ...
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SERIAL INTERFACE READ/WRITE EXAMPLES Write to one control register: • Start signal • Slave address byte (R/ W bit = low) • Base address byte • Data byte to base address • Stop signal • Write to four consecutive control ...
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AD9889 PCB LAYOUT RECOMMENDATIONS The AD9889 is a high precision, high speed analog device. As such, to get the maximum performance out of the part important to have a well laid out board. The following is a guide ...
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COLOR SPACE CONVERTER (CSC) COMMON SETTINGS Table 30. HDTV YCbCr (0 to 255) to RGB (0 to 255) (Default Setting for AD9889) Register Red/Cr Coeff 1 Address 0x18 0x19 Value 0x0C 0x52 Register Green/Y Coeff 1 Address 0x20 0x21 Value ...
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AD9889 Table 34. RGB (0 to 255) to HDTV YCbCr (0 to 255) Register Red/Cr Coeff 1 Address 0x18 0x19 Value 0x08 0x2D Register Green/Y Coeff 1 Address 0x20 0x21 Value 0x03 0x68 Register Blue/Cb Coeff 1 Address 0x28 0x29 ...
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... OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE VIEW A ROTATED 90° CCW ORDERING GUIDE Model Temperature Range 1 0°C to 70°C AD9889KSTZ-80 AD9889/PCB Pb-free part. 16.20 16.00 SQ 0.75 1.60 15.80 0.60 MAX 0. PIN 1 TOP VIEW (PINS DOWN) 0.20 0.09 7° ...
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AD9889 Notes Rev Page ...
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Notes Rev Page AD9889 ...
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AD9889 Notes 2 Purchase of licensed I C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, ...