AD9889KSTZ-80 Analog Devices Inc, AD9889KSTZ-80 Datasheet - Page 7

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AD9889KSTZ-80

Manufacturer Part Number
AD9889KSTZ-80
Description
TRANSMITTER HDMI/DVI 80-LQFP
Manufacturer
Analog Devices Inc
Type
HDMI, DVI Transmitterr
Datasheet

Specifications of AD9889KSTZ-80

Applications
Recorders, Set-Top Boxes
Mounting Type
Surface Mount
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Pin Type
POWER SUPPLY
CONTROL
Table 5. Pin Function Descriptions
Pin Mnemonic
OUTPUTS
SERIAL PORT (2-WIRE)
INPUTS
TxC+
TxC−
Tx2+
Tx2−
Tx1+
Tx1−
Tx0+
Tx0−
INT
SDA
SCL
DDSDA
DDCSCL
MDA
MCL
D[23:0]
CLK
DE
HSYNC
VSYNC
EXT_SW
HPD
S/PDIF
MCLK
I
I
LRCLK
PD/A0
2
2
S[3:0]
S CLK
Pin No.
24, 29, 36, 41
1, 61, 62, 63, 64
16, 19, 20, 21
15, 17, 18, 22,
26, 32, 39, 42,
43, 59, 60, 79,
80
47
46
48
49
45
44
Description
Differential Clock Output at Pixel Clock Rate; Transition Minimized Differential Signaling (TMDS).
Differential Clock Output Complement.
Differential Output of the Red Data at 10× the Pixel Clock Rate; TMDS.
Differential Red Output Complement.
Differential Output of the Green Data at 10× the Pixel Clock Rate; TMDS.
Differential Green Output Complement.
Differential Output of the Blue Data at 10× the Pixel Clock Rate; TMDS.
Differential Blue Output Complement.
Monitor Sense.
Serial Port Data I/O.
Serial Port Data Clock.
Serial Port Data I/O Master to Receiver.
Serial Port Data Clock Master to Receiver.
Serial Port Data I/O Master to HDCP Keys.
Serial Port Data Clock Master to HDCP Keys.
For a full description of the 2-wire serial register and how it works, refer to the 2-Wire Serial Control Port section.
Digital Input in RGB or YCbCr Format.
Video Clock Input.
Data Enable for Video Data.
Horizontal Sync Input.
Vertical Sync Input. This is the input for vertical sync.
Swing Adjust Sets the Differential Output Voltage or Swing. An 887 Ω resistor (1% tolerance) should be placed
between this pin and ground.
Hot Plug Detect. This indicates to the interface whether the receiver is connected.
S/PDIF Audio Input. This is the audio input from a Sony/Philips Digital Interface.
Audio Reference Clock. Set either to 128 × fs or 256 × fs.
I
I
Left/Right Channel Selection.
Power Down.
2
2
S Audio Inputs. These represent the eight channels of audio (two per input) available through I
S Audio Clock.
Mnemonic
AV
DV
PV
GND
SDA
SCL
MDA
MCL
DDSDA
DDCSCL
DD
DD
DD
Description
Output Power Supply
Digital and I/O Power Supply
PLL Power Supply
Ground
Serial Port Data I/O
Serial Port Data Clock (100 kHz Maximum)
Serial Port Data I/O to HDCP Keys
Serial Port Data Clock to HDCP Keys
Serial Port Data I/O to Receiver
Serial Port Data Clock to Receiver
Rev. 0 | Page 7 of 48
2
S.
Value
1.8 V
1.8 V
1.8 V
0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
AD9889

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