TLE 7269G Infineon Technologies, TLE 7269G Datasheet - Page 17

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TLE 7269G

Manufacturer Part Number
TLE 7269G
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE 7269G

Packages
PG-DSO-14
Transmission Ratemax
20.0 kbit/s
Quiescent Current (max.)
< 10 µA sleep mode
Bus Wake-up Capability
Yes
Additional Features
2 x LIN trx, INH, EN, WK, Vio
Wake-up Inputs
Bus wake-up + wake-up pin
In Stand-By mode the RxD1 pin signals the low power supply condition with a “High” signal. A logical “High” on
the EN pin changes the operation mode back to Normal Operation mode.
In case the supply voltage
disables the output and receiver stages. This feature secures the communication on the LIN bus. If the power
supply
operation. A mode change only applies if the power supply
V
If the power supply
disabled as well. When
with normal operation and data transmission.
4.11
If the TxD1 or TxD2 signal is dominant for a time t > t
of the LIN signal to the bus and disables both, the output stage 1 and the output stage 2. This is realized to prevent
the bus from being blocked by a permanent “Low” signal on the TxD1 or TxD2 pin, caused by an error on the
external microcontroller (see
The transmission is released again, after a rising edge at TxD1 or TxD2 has been detected.
Figure 12
Data Sheet
S,UV,PON
V
S
).
reaches a higher level as the Under-Voltage level
TxD Time Out function
TxD Time-Out function
BUS2
BUS1
TxD2
TxD1
Normal Communication
V
IO
V
drops below the Under-Voltage level
IO
reaches a higher level as the Under-Voltage
TxD Time-Out due to
microcontroller error
V
Figure
S
Normal Communication
is dropping below the specified operation range (see
12).
TxD Time-Out due to
microcontroller error
t
timeout
t
timeout
timeout
17
microcontroller error
Recovery of the
t
torec
the TxD time-out function deactivates the transmission
V
V
S
V
IO
>
S
Release after TxD
>
V
drops below the power on reset level (
microcontroller error
S,UV,BLK
V
Normal Communication
Time-out
Recovery of the
t
IO,UV
torec
V
IO
the output and receiver stages will be
>
the TLE7269G continues with normal
Release after TxD
V
IO,UV
Normal Communication
Time-out
level the TLE7269G continues
Table
Functional Description
t
Rev. 1.2, 2007-11-13
5), the TLE7269G
t
t
t
TLE7269G
V
S
<

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