AD8302 Analog Devices, AD8302 Datasheet

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AD8302

Manufacturer Part Number
AD8302
Description
Manufacturer
Analog Devices
Datasheet

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a
PRODUCT DESCRIPTION
The AD8302 is an innovative, fully integrated system for mea-
suring gain/loss and phase in numerous receive, transmit, and
instrumentation applications. It requires few external compo-
nents and a single supply of 2.7 V–5.5 V. The ac-coupled input
signals can range from –60 dBm to 0 dBm in a 50 Ω system, from
low frequencies up to 2.7 GHz. The outputs provide an accu-
rate measurement of either gain or loss over a ± 30 dB range
scaled to 30 mV/dB, and of phase over a 0°–180° range scaled to
10 mV/degree. Both subsystems have an output bandwidth of
30 MHz, which may optionally be reduced by the addition of
external filter capacitors. The AD8302 can be used in direct
control mode to servo gain and phase of a signal chain toward
predetermined setpoints.
The AD8302 comprises a closely matched pair of demodulating
logarithmic amplifiers, each having a 60 dB measurement range.
By taking the difference of their outputs, a measurement of
the magnitude ratio or gain between the two input signals is
available. These signals may even be at different frequencies,
allowing the measurement of conversion gain or loss. The AD8302
may be used to determine absolute signal level by applying the
unknown signal to one input and a calibrated ac reference signal
to the other. With the output stage feedback connection dis-
abled, a comparator may be realized, using the setpoint pins
MSET and PSET to program the thresholds.
The signal inputs are single-ended, allowing them to be matched
and connected directly to a directional coupler. Their input
impedance is nominally 3 kΩ at low frequencies.
The AD8302 includes a phase detector of the multiplier type,
but with precise phase balance, driven by the fully limited sig-
nals appearing at the outputs of the two logarithmic amplifiers.
Thus, the phase accuracy measurement is independent of signal
level over a wide range.
The phase and gain output voltages are simultaneously available
at loadable ground referenced outputs over the standard output
range of 0 V to 1.8 V. The output drivers can source or sink up
to 8 mA. A loadable, stable reference voltage of 1.8 V is avail-
able for precise repositioning of the output range by the user.
In controller applications, the connection between the gain
output pin VMAG and the setpoint control pin MSET is broken.
The desired setpoint is presented to MSET and the VMAG
control signal drives an appropriate external variable gain device.
Likewise, the feedback path between the phase output pin VPHS
and its setpoint control pin PSET may be broken, to allow
operation as a phase controller.
The AD8302 is fabricated on Analog Devices’ proprietary, high-
performance 25 GHz SOI complementary bipolar IC process. It is
available in a 14-lead TSSOP package and operates over a –40°C
to +85°C temperature range. An evaluation board is available.
RF/IF Gain and Phase Detector
COMM
OFSA
OFSB
VPOS
INPA
INPB
FUNCTIONAL BLOCK DIAGRAM
BIAS
AD8302
VIDEO OUTPUT – A
VIDEO OUTPUT – B
60dB LOG AMPS
60dB LOG AMPS
(7 DETECTORS)
(7 DETECTORS)
DETECTOR
PHASE
+
+
+
LF–2.7 GHz
AD8302
x3
1.8V
MFLT
VMAG
MSET
PSET
VPHS
PFLT
VREF

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AD8302 Summary of contents

Page 1

... The signal inputs are single-ended, allowing them to be matched and connected directly to a directional coupler. Their input impedance is nominally 3 kΩ at low frequencies. The AD8302 includes a phase detector of the multiplier type, but with precise phase balance, driven by the fully limited sig- nals appearing at the outputs of the two logarithmic amplifiers. ...

Page 2

... AD8302–SPECIFICATIONS resistors connected to INPA and INPB, for Phase measurement P Parameter Conditions OVERALL FUNCTION Input Frequency Range Gain Measurement Range P IN φ Phase Measurement Range IN Pin VREF, –40°C ≤ T Reference Voltage Output INPUT INTERFACE Pins INPA and INPB To AC Ground, f ≤ 500 MHz ...

Page 3

... INPA INPB ≤ +85° ± –30 dBm A INPA INPB = P = –5 dBm to –50 dBm INPB ≤ +85°C, Delta Phase = 90 Degrees A ≤ +85°C, Delta Phase = ± 30 Degrees ≤ +85°C A AD8302 Min Typ Max Unit 28.7 mV/dB 0.25 dB 0.25 dB 0.2 dB 143 ...

Page 4

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8302 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 5

... VPOS 100mV 4k INPA(INPB LOG-AMP OFSA(OFSB) 10pF COMM VPOS VREF 10k 5k COMM + 750 – 2k VPOS 10k MSET (PSET) 10k ACTIVE LOADS COMM AD8302 VPOS 25 VMAG (VPHS) CLASS A-B CONTROL COMM VPOS MFLT (PFLT) 1.5pF COMM ...

Page 6

... AD8302 Typical Performance Characteristics noted. All references to dBm are referred to 50 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 –30 –25 –20 –15 –10 – MAGNITUDE RATIO – dB Ω 2.0 1900 1.8 1.6 1.4 2700 1.2 1.0 0.8 0.6 0.4 0.2 0 –30 –25 –20 –15 –10 – MAGNITUDE RATIO – dB 1.80 1.65 1.50 1.35 1.20 1.05 0.90 0.75 0.60 0.45 0.30 0.15 0 –30 –20 –10 0 MAGNITUDE RATIO – dB ° ...

Page 7

... AD8302 – MAGNITUDE RATIO – dB ° ° –40dBm –45dBm –30dBm –15dBm –15dBm –20 – MAGNITUDE RATIO – 5dB INPA INPB ...

Page 8

... AD8302 1.06 1.04 1. INPA INPB 1.00 0.98 0.96 0.94 0.92 0. INPA 0.88 0.86 0.84 0.82 0. 0.78 INPA INPB 0.76 0.74 0 200 400 600 800 1000 1200 1400 FREQUENCY – MHz 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 –1.2 –1.4 –1.6 –1.8 –40 – TEMPERATURE – –5 –10 –15 –20 –25 – ...

Page 9

... INPUT –10dBm 100 10 1k 10k 100k 1M FREQUENCY – Hz 10000 INPUT –50dBm 1000 INPUT –30dBm 100 INPUT –10dBm 10 1k 10k 100k 1M FREQUENCY – Hz 0.18 0.16 0.14 0.12 0.10 0.08 2700 1900 0.06 1200 900 0.04 100 0.02 0.00 –25 –20 –15 –10 – MAGNITUDE RATIO – dB AD8302 10M 100M 10M 100M ...

Page 10

... AD8302 1.8 100MHz 900MHz 1.6 1.4 190MHz 1.2 2200MHz 2700MHz 1.0 0.8 0.6 0.4 0.2 0.0 –180 –140 –100 –60 –20 20 PHASE DIFFERENCE – Degrees 1.80 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 0.18 1.11022e–16 –180 –150 –120 –90 –60 – PHASE DIFFERENCE – Degrees 1.80 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 0.18 0.00 –180 –150 –120 –90 –60 – PHASE DIFFERENCE – Degrees 1.80 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 0.18 1.11022e–16 ...

Page 11

... AD8302 MEAN +3 SIGMA MEAN –3 SIGMA TEMPERATURE – SIGMA –3 SIGMA ...

Page 12

... AD8302 9.5 9.7 9.9 10.1 10.3 10.5 VPHS – mV/Degree 10mV PER VERTICAL DIVISION 50ns HORIZONTAL ° ° 10mV PER VERTICAL DIVISION 2 s HORIZONTAL ° 10.7 10.9 11.1 10000 1000 100 10 ° ° 1.80 1.62 1.44 1.26 1.08 0.90 0.72 0.54 0.36 0.18 1.11022e–16 –180 –150 ° ° 10mV PER VERTICAL DIVISION 50ns HORIZONTAL ° ...

Page 13

... CAPACITANCE SHUNT Z (pF) 500 0 90 120 150 180 0 AD8302 P = –20dBm INPA P = –40dBm INPA P = –30dBm INPA –120 –90 –60 – 120 150 180 PHASE DIFFERENCE – Degrees P = – ...

Page 14

... AD8302 –2 –4 –6 –40 –30 –20 – TEMPERATURE – C 120 100 10k 100k 1M FREQUENCY – 1.74 10M 100M 1.76 1.78 1.80 1.82 1.84 1.86 1.88 VREF – V ...

Page 15

... V Φ relative phase in degrees. Structure The general form of the AD8302 is shown in Figure 2. The major blocks consist of two demodulating log amps, a phase detector, output amplifiers, a biasing cell and an output refer- ence voltage buffer. The log amps and phase detector process the high-frequency signals and deliver the gain and phase infor- mation in current form to the output amplifiers ...

Page 16

... BASIC CONNECTIONS Measurement Mode The basic function of the AD8302 is the direct measurement of gain and phase. When the output pins, VMAG and VPHS, are connected directly to the feedback setpoint input pins, MSET and PSET, the default slopes and center-points are invoked. This basic connection shown in Figure 4 is termed the measurement mode ...

Page 17

... This means that both gain and attenuation can be measured. The limits are determined by the minimum and maximum levels that each individual log amp can detect. In the AD8302, each log amp can detect inputs ranging from –73 dBV (223 µV, –60 dBm re: 50 Ω ...

Page 18

... MAG Comparator and Controller Modes The AD8302 can also operate in a comparator mode if used in the arrangement shown in Figure 10 where the DUT is the ele- ment to be evaluated. The VMAG and VPHS pins are no longer connected to MSET and PSET. The trip-point thresholds for ...

Page 19

... B A signals of the “Black Box” DUT. The attenuators ensure that the signal levels presented to the AD8302 fall within its dynamic range. From the discussion in the Dynamic Range section, the optimal choice places both channels at P enced to 50 Ω, which corresponds to –43 dBV. To achieve this, ...

Page 20

... The measurement accuracy can be compromised if board level details are not addressed. Minimize the physical distance between the series connected couplers since the extra path is defined as, length adds phase error to . Keep the paths from the couplers to the AD8302 as well matched as possible since any differences – Z )/( (16) ...

Page 21

... SW1 GSET R7 VREF R9 SW2 R3 R8 PSET PHASE C8 R6 Table III. Evaluation Board Configuration Options AD8302 Table II. P1 Pin Allocations 1 Common 2 VPOS 3 Common Default Condition Not Applicable 52.3 Ω (Size 0402 kΩ (Size 0603 Ω (Size 0603 Ω (Size 0603 100 pF (Size 0603 0.1 µ ...

Page 22

... AD8302 CHARACTERIZATION SETUPS AND METHODS The general hardware configuration used for most of the AD8302 characterization is shown in Figure 16. The characterization board is similar to the Customer Evaluation Board. Two reference-locked R & S SMT03 signal generators are used as the inputs to INPA and INPB, while the Gain and Phase outputs are monitored using both a TDS 744A oscilloscope with 10× ...

Page 23

... OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 14-Lead Thin Shrink SO Package (TSSOP) (RU-14) 0.201 (5.10) 0.193 (4.90 0.177 (4.50) 0.169 (4.30) 0.256 (6.50) 0.246 (6.25 PIN 1 0.006 (0.15) 0.0433 (1.10) MAX 0.002 (0.05) 8 0.0256 0.0118 (0.30) 0 SEATING 0.0079 (0.20) (0.65) 0.0075 (0.19) PLANE 0.0035 (0.090) BSC AD8302 0.028 (0.70) 0.020 (0.50) ...

Page 24

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