ATMEGA128A-16AU ATMEL Corporation, ATMEGA128A-16AU Datasheet

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ATMEGA128A-16AU

Manufacturer Part Number
ATMEGA128A-16AU
Description
Manufacturer
ATMEL Corporation
Datasheet

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Features
High-performance, Low-power AVR
Advanced RISC Architecture
High Endurance Non-volatile Memory segments
JTAG (IEEE std. 1149.1 Compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltages
Speed Grades
– 133 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers + Peripheral Control Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-chip 2-cycle Multiplier
– 128K Bytes of In-System Self-programmable Flash program memory
– 4K Bytes EEPROM
– 4K Bytes Internal SRAM
– Write/Erase cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Up to 64K Bytes Optional External Memory Space
– Programming Lock for Software Security
– SPI Interface for In-System Programming
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
– Two Expanded 16-bit Timer/Counters with Separate Prescaler, Compare Mode and
– Real Time Counter with Separate Oscillator
– Two 8-bit PWM Channels
– 6 PWM Channels with Programmable Resolution from 2 to 16 Bits
– Output Compare Modulator
– 8-channel, 10-bit ADC
– Byte-oriented Two-wire Serial Interface
– Dual Programmable Serial USARTs
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with On-chip Oscillator
– On-chip Analog Comparator
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby,
– Software Selectable Clock Frequency
– ATmega103 Compatibility Mode Selected by a Fuse
– Global Pull-up Disable
– 53 Programmable I/O Lines
– 64-lead TQFP and 64-pad QFN/MLF
– 2.7 - 5.5V for ATmega128A
– 0 - 16 MHz for ATmega128A
Capture Mode
and Extended Standby
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
8 Single-ended Channels
7 Differential Channels
2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
®
8-bit Microcontroller
(1)
8-bit
Microcontroller
with 128K Bytes
In-System
Programmable
Flash
ATmega128A
Summary
Rev. 8151DS–AVR–07/09

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ATMEGA128A-16AU Summary of contents

Page 1

... Global Pull-up Disable • I/O and Packages – 53 Programmable I/O Lines – 64-lead TQFP and 64-pad QFN/MLF • Operating Voltages – 2.7 - 5.5V for ATmega128A • Speed Grades – MHz for ATmega128A ® 8-bit Microcontroller (1) 8-bit Microcontroller with 128K Bytes In-System Programmable Flash ...

Page 2

... Figure 1-1. Note: 2. Overview The ATmega128A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega128A achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. ...

Page 3

... GENERAL PURPOSE REGISTERS ALU STATUS REGISTER DATA REGISTER DATA DIR. PORTB REG. PORTB PORTB DRIVERS PB0 - PB7 ATmega128A PC0 - PC7 PORTC DRIVERS DATA REGISTER DATA DIR. PORTC REG. PORTC 8-BIT DATA BUS CALIB. OSC INTERNAL OSCILLATOR OSCILLATOR WATCHDOG TIMER OSCILLATOR ...

Page 4

... Atmel ATmega128A is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The ATmega128A AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits. ...

Page 5

... As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the ATmega128A as listed on page 73. ...

Page 6

... As inputs, Port E pins that are externally pulled low will source current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port E also serves the functions of various special features of the ATmega128A as listed on page 81. ...

Page 7

... By holding this pin low during a Power-on Reset, the device will enter the SPI Serial Pro- gramming mode. PEN has no function during normal operation. 8151DS–AVR–07/09 324. Shorter pulses are not guaranteed to generate a reset. , even if the ADC is not used. If the ADC is used, it should be connected ATmega128A “System and Reset CC 7 ...

Page 8

... Resources A comprehensive set of development tools, application notes, and datasheets are available for download on http://www.atmel.com/avr. ATmega128A/L rev characterization is found in the ATmega128A Appendix B. Note: 4. Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. ...

Page 9

... RWWSRE BLBSET – – – – – – – – PORTG4 PORTG3 – – DDG4 DDG3 – – PING4 PING3 ATmega128A Bit 2 Bit 1 Bit 0 – – – – – – – – – – – – UCSZ11 UCSZ10 UCPOL1 UPE1 U2X1 ...

Page 10

... ACBG ACO ACI ACIE REFS0 ADLAR MUX4 MUX3 ADSC ADFR ADIF ADIE ADC Data Register High Byte ADC Data Register Low byte PORTE6 PORTE5 PORTE4 PORTE3 ATmega128A Bit 2 Bit 1 Bit 0 PORTF2 PORTF1 PORTF0 DDF2 DDF1 DDF0 – – – – ...

Page 11

... I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only. 8151DS–AVR–07/09 Bit 6 Bit 5 Bit 4 Bit 3 DDE6 DDE5 DDE4 DDE3 PINE6 PINE5 PINE4 PINE3 PINF6 PINF5 PINF4 PINF3 ATmega128A Bit 2 Bit 1 Bit 0 DDE2 DDE1 DDE0 PINE2 PINE1 PINE0 PINF2 PINF1 PINF0 Page ...

Page 12

... BRHS k Branch if Half Carry Flag Set BRHC k Branch if Half Carry Flag Cleared BRTS k Branch if T Flag Set BRTC k Branch if T Flag Cleared 8151DS–AVR–07/09 ATmega128A Operation Flags Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rdh:Rdl ← Rdh:Rdl + K Z,C,N,V,S Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rd ← ...

Page 13

... SEZ Set Zero Flag CLZ Clear Zero Flag SEI Global Interrupt Enable CLI Global Interrupt Disable 8151DS–AVR–07/09 ATmega128A then PC ← None then PC ← None Operation Flags then PC ← None then PC ← None Rd ← ...

Page 14

... SEH Set Half Carry Flag in SREG CLH Clear Half Carry Flag in SREG MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 8151DS–AVR–07/09 ATmega128A S ← ← Operation Flags V ← ← ← ← ← ...

Page 15

... Halide free and fully Green. 64A 64-lead 1.0 mm, Thin Profile Plastic Quad Flat Package (TQFP) 64M1 64-pad 1.0 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 8151DS–AVR–07/09 (2) Ordering Code Package ATmega128A-16AU 64A ATmega128A-16MU 64M1 Package Type ATmega128A (1) Operation Range Industrial ...

Page 16

... Orchard Parkway San Jose, CA 95131 R 8151DS–AVR–07/09 B PIN 1 IDENTIFIER TITLE 64A, 64-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega128A A2 A COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – ...

Page 17

... Option A Triangle 2 3 Option B Pin #1 Chamfer (C 0.30) Option C Pin #1 Notch e (0.20 R) TITLE 64M1, 64-pad 1.0 mm Body, Lead Pitch 0.50 mm, 5.40 mm Exposed Pad, Micro Lead Frame Package (MLF) ATmega128A C SEATING PLANE A1 A 0.08 C SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM NOTE A ...

Page 18

... Errata The revision letter in this section refers to the revision of the ATmega128A device. 9.1 ATmega128A Rev. U • Wrong value for Version in the JTAG Device Identification Register • First Analog Comparator conversion may be delayed • Interrupts may be lost when writing the timer registers in the asynchronous timer • ...

Page 19

... Update-DR. Problem Fix / Workaround – If ATmega128A is the only device in the scan chain, the problem is not visible. – Select the Device ID Register of the ATmega128A by issuing the IDCODE – If the Device IDs of all devices in the boundary scan chain must be captured 6 ...

Page 20

... Updated the last page with Atmel’s new addresses. Updated “Errata” on page 375. ATmega128A Rev. U. Updated view of “Typical Characteristics” on page 337 Editorial updates. Initial revision. (Based on the ATmega128/L datasheet 2467R-AVR-06/08) Changes done compared to the ATmega128/L datasheet 2467R-AVR-06/08: - Updated “ ...

Page 21

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2009 Atmel Corporation. All rights reserved. Atmel trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia Atmel Europe Unit 1-5 & ...

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