M16C Renesas Electronics Corporation., M16C Datasheet
M16C
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... Renesas Technology Corp. without notice. Please review the latest information published by Renesas Technology Corp. through various means, including the Renesas Technology Corp. website (http://www.renesas.com). Rev. 2.00 Revision Date: Feb.15, 2007 M16C/26A (M16C/26A, M16C/26B, M16C/26T) RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES Group Hardware Manual www.renesas.com ...
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This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in ...
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General Precautions in the Handling of MPU/MCU Products The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes on the products covered by this manual, refer to the relevant sections of the manual. If ...
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... The revision history summarizes the locations of revisions and additions. It does not list all revisions. Refer to the text of the manual for details. The following documents apply to the M16C/26A Group (M16C/26A, M16C/26B, and M16C/26T). Make sure to refer to the latest versions of these documents. The newest versions of the documents listed may be obtained from the Renesas Technology Web site ...
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Notation of Numbers and Symbols The notation conventions for register names, bit names, numbers, and symbols used in this manual are described below. (1) Register Names, Bit Names, and Pin Names Registers, bits, and pins are referred to in ...
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Register Notation The symbols and terms used in register diagrams are described below. XXX Register Bit Symbol XXX0 XXX1 XXX4 XXX5 XXX6 XXX7 *1 Blank: Set ...
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List of Abbreviations and Acronyms Abbreviation ACIA bps CRC DMA DMAC GSM Hi-Z IEBus I/O IrDA LSB MSB NC PLL PWM SFR SIM UART VCO All trademarks and registered trademarks are the property of their respective owners. IEBus is ...
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Table of Contents Quick Reference by Address _______________________ B-1 1. Overview ______________________________________ 1 1.1 Applications ................................................................................................................... 1 1.2 Performance Outline ..................................................................................................... 2 1.3 Block Diagram ............................................................................................................... 4 1.4 Product List ................................................................................................................... 6 1.5 Pin Assignments .......................................................................................................... 11 1.6 Pin Description ...
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Reset ________________________________________ 26 5.1 Hardware Reset .......................................................................................................... 26 5.1.1 Hardware Reset 1 ................................................................................................ 26 5.1.2 Hardware Reset 2 ................................................................................................ 26 5.2 Software Reset ............................................................................................................ 27 5.3 Watchdog Timer Reset ................................................................................................ 27 5.4 Oscillation Stop Detection Reset ................................................................................. 27 5.5 ...
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Interrupts and Interrupt Vector .................................................................................... 64 9.2.1 Fixed Vector Tables .............................................................................................. 64 9.2.2 Relocatable Vector Tables ................................................................................... 65 9.3 Interrupt Control .......................................................................................................... 66 9.3.1 I Flag .................................................................................................................... 69 9.3.2 IR Bit .................................................................................................................... 69 9.3.3 ILVL2 to ILVL0 Bits and ...
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Three-phase Motor Control Timer Function ............................................................ 117 12.3.1 Position-data-retain Function ........................................................................... 128 12.3.2 Three-phase/Port Output Switch Function ....................................................... 130 13. Serial I/O ___________________________________ 132 13.1. UARTi (i=0 to 2)...................................................................................................... 132 13.1.1. Clock Synchronous serial I/O Mode ................................................................ 142 13.1.2. ...
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Memory Map ........................................................................................................... 232 17.3 Functions To Prevent Flash Memory from Rewriting............................................... 235 17.3.1 ROM Code Protect Function ............................................................................ 235 17.3.2 ID Code Check Function .................................................................................. 235 17.4 CPU Rewrite Mode ................................................................................................. 237 17.4.1 EW0 Mode ....................................................................................................... 238 17.4.2 ...
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... Electrical Characteristics _______________________ 261 18.1. M16C/26A, M16C/26B (Normal version) ................................................................ 261 18.2. M16C/26T (T version) ............................................................................................ 280 19. Usage Notes ________________________________ 299 19.1 SFR ......................................................................................................................... 299 19.1.1 Precaution for 48-pin package ......................................................................... 299 19.1.2 Precaution for 42-pin package ......................................................................... 299 19.1.3 Register Setting ............................................................................................... 299 19.2 PLL Frequency Synthesizer .................................................................................... 300 19.3 Power Control ......................................................................................................... 301 19.4 Protect ..................................................................................................................... 303 19.5 Interrupts ................................................................................................................. 304 19 ...
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... Flash Memory Version Electrical Characteristics 10,000 E/W cycle product .. 322 19.13.16 Boot Mode .................................................................................................... 322 19.14 Noise ..................................................................................................................... 323 19.15 Instruction for a Device Use .................................................................................. 324 Appendix 1. Package Dimensions___________________ 325 Appendix 2. Functional Difference __________________ 326 Appendix 2.1 Differences between M16C/26A, M16C/26B, and M16C/26T ................... 326 Appendix 2.2 Differences between M16C/26A Group and M16C/26 Group ................... 327 Register Index __________________________________ 328 A-7 ...
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Quick Reference by Address Register Address 0000 16 0001 16 0002 16 0003 16 Processor mode register 0 0004 16 Processor mode register 1 0005 16 System clock control register 0 0006 16 System clock control register 1 0007 16 ...
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Quick Reference by Address Register Address 0080 16 0081 16 0082 16 0083 16 0084 16 0085 16 0086 16 01B0 16 01B1 16 01B2 16 01B3 Flash memory control register 4 16 01B4 16 Flash memory control register 1 ...
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Quick Reference by Address Register Address Count start flag 0380 16 Clock prescaler reset flag 0381 16 One-shot start flag 0382 16 Trigger select register 0383 16 Up-down flag 0384 16 0385 16 0386 16 Timer A0 register 0387 16 ...
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... The M16C/26A Group (M16C/26A, M16C/26B, M16C/26T single-chip control MCU, fabricated using high-performance silicon gate CMOS technology, embedding the M16C/60 Series CPU core. The M16C/ 26A Group (M16C/26A, M16C/26B, M16C/26T) is housed in 42-pin and 48-pin plastic molded packages. This MCU combines advanced instruction manipulation capabilities to process complex instructions by less bytes and execute instructions at higher speed ...
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... Programming /erasure endurance Operating Ambient Temperature Package NOTES: 1. IEBus is a trademark of NEC Electronics Corporation. 2. See Tables 1.7 to 1.10 Product Code for the program and erase endurance, and operating ambient temperature. 3. The PLL frequency synthesizer is used to run the M16C/26B at f(BCLK MHz. page ...
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... Operating Ambient Temperature Package NOTES: 1. IEBus is a trademark of NEC Electronics Corporation. 2. See Tables 1.7 and 1.8 Product Code for the program and erase endurance, and operating ambient tempera- ture. 3. The PLL frequency synthesizer is used to run the M16C/26B at f(BCLK MHz. page ...
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... 1.3 Block Diagram Figure 1.1 and 1.2 show block diagrams of the M16C/26A Group (M16C/26A, M16C/26B, M16C/26T) 48- pin package and 42-pin package. 3 Port P6 Port P1 Peripheral functions Timer (16-bit) Output (timer A): 5channels Input (timer B): 3 channels Three-phase motor control circuit 10-bit A/D converter ...
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... Port P8 Port P7 UART or clock synchronous serial I/O (8 bits X 2 channels) M16C/60 series CPU core R0H R0L R1H R1L Port P9 Port P10 Clock generation circuit XIN-XOUT XCIN-XCOUT On-Chip Oscillator ...
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... Table 1.6 M16C/26T V-ver ...
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... Product code: See Tables 1.7 to 1.10 Package type: GP: PLQP0048KB-A (48P6Q) (M16C/26A, M16C/26B, M16C/26T) FP: PRSP0042GA-B (42P2R) (M16C/26A, M16C/26B) ROM number: ROM number is omitted in flash memory version Version M16C/26A B : M16C/26B T : M16C/26T T-ver M16C/26T V-ver. ROM / RAM capacity: 3: (24K+4K) bytes ...
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... U 5 NOTE: 1. The lead contained products, D3, D5, D7, and D9 are put together with U3, U5, U7, and U9 respectively. Lead-free products can be mounted by both conventional Sn-Pb paste and Lead-free paste (Sn-Ag-Cu plating). Table 1.9 Product Code (Flash Memory Version) - M16C/26T T-ver ...
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... (1) Flash memory version, PLQP0048KB-A (48P6Q), M16C/26A, M16C/26B 0260F8A XXXXX (2) Flash memory version, PRSP0042GA-B (42P2R), M16C/26A, M16C/26B M30263F8AFP XXXXXXX (3) MASK ROM version, PLQP0048KB-A (48P6Q), M16C/26A 0260M8A 001A U3 XXXXX (4) MASK ROM version, PRSP0042GA-B (42P2R), M16C/26A M30263M8A-001FP XXXXXXX Figure 1 ...
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... (1) Flash memory version, PLQP0048KB-A (48P6Q), M16C/26T T-ver. 0260F8T XXXXX (2) Flash memory version, PLQP0048KB-A (48P6Q), M16C/26T V-ver. 0260F8V XXXXX Figure 1.5 Marking Diagram (M16C/26T) page ...
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1.5 Pin Assignments Figures 1.6 and 1.7 show the Pin Assignments (top view). P10 /AN /KI ...
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Table 1.11 Pin Characteristics for 48-Pin Package ...
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P10 / REF /TB1 ...
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Table 1.12 Pin Characteristics for 42-Pin Package ...
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... Apply 0V to the Vss pin. Apply following voltage to the Vcc pin. 2.7 to 5.5 V (M16C/26A, M16C/26B), 3.0 to 5.5 V (M16C/26T T-ver.), 4.2 to 5.5 V (M16C/26T V-ver.) I Supplies power to the A/D converter. Connect the AV the AV pin The MCU reset state when "L" is applied to the ...
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Table 1.13 Pin Description ( 48-pin packages only) (Continued) Classification Pin Name _________ Serial I/O CTS0 ...
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Central Processing Unit (CPU) Figure 2.1 shows the CPU registers. The register bank is comprised ...
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2.3 Frame Base Register (FB configured with 16 bits, and is used for FB ...
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... Memory Figure 3 memory map of the M16C/26A Group (M16C/26A, M16C/26B, M16C/26T). The M16C/26A Group provides 1-Mbyte address space addresses 00000 The internal ROM is allocated lower address, beginning with address FFFFF internal ROM area is allocated in addresses F0000 of 2-Kbyte internal ROM area, block A and block B, for data space. These blocks are allocated addresses ...
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... The blank spaces are reserved. No access is allowed. 2. Bits CM27, CM21, and CM20 do not change at oscillation stop detection reset. 3. The VCR1 and VCR2 registers do not change at software reset, watchdog timer reset, and oscillation stop detection reset. 4. Registers VCR1, VCR2, and D4INT cannot be used in M16C/26T. 5. M16C/26A, M16C/26B X : Undefined ...
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Table 4.2 SFR Information(2) Address 0040 16 0041 16 0042 16 0043 16 INT3 interrupt control ...
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Table 4.3 SFR Information(3) Address 0080 16 0081 16 0082 16 0083 16 0084 16 0085 ...
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Table 4.4 SFR Information(4) Address 0340 16 0341 16 Timer A1-1 register 0342 16 0343 16 ...
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Table 4.5 SFR Information(5) Address Count start flag 0380 16 0381 Clock prescaler reset flag 16 ...
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Table 4.6 SFR Information(6) Address A/D register 0 03C0 16 03C1 16 A/D register 1 03C2 ...
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... Apply an “H” signal to the RESET pin. 5.1.2 Hardware Reset 2 Note M16C/26T does not use this function. This reset is generated by the microcomputer’s internal voltage detection circuit. The voltage detec- tion circuit monitors the voltage supplied to the V If the VC26 bit in the VCR2 register is set to “1” (reset level detection circuit enabled), the microcom- ...
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RESET CC Figure 5.1.1.1. Example Reset Circuit 5.2 Software Reset When the PM03 bit in ...
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ROC td(P-R) More than td(ROC) RESET CPU clock Address Figure 5.1.1.2. Reset Sequence Table ...
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... M 5.5 Voltage Detection Circuit Note assumed. Voltage Detection Circuit is not available in M16C/26T. CC The voltage detection circuit has circuits to monitor the input voltage at the V voltage with respect to Vdet3, and Vdet4, respectively. Use the VC26 to VC27 bits in the VCR2 register to select whether or not to enable these circuits. ...
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...
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Vdet4 Vdet3r VCC Vdet3 Vdet3s VSS RESET Internal Reset Signal VC13 bit in VCR1 register VC26 ...
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5.5.1 Voltage Down Detection Interrupt If the D40 bit in the D4INT register is set to ...
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Voltage Down Detection Circuit D4INT clock(the clock with which it VC27 operates also in wait mode) ...
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5.5.2 Limitations on Exiting Stop Mode The voltage down detection interrupt is immediately generated and the ...
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Processor Mode The microcomputer supports single-chip mode only. Figures 6.1 and 6.2 show the associated ...
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Processeor Mode Register NOTES: 1. Write ...
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The internal bus consists of CPU bus, memory bus, and peripheral bus. Bus Interface Unit (BIU) ...
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... CIN COUT Available Available ) Stopped Oscillating (CPU clock source Clock Generation Circuit PLL frequency synthesizer CPU clock source Peripheral function clock source MHz 1(ROC) 2(ROC) 3(ROC MHz (M16C/26B Available Stopped M16C/26A ( ) M16C/26T ...
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CM10=1(stop mode WAIT instruction R RESET Software reset NMI Interrupt request level ...
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... OUT -X oscillator function), wait until the sub-clock oscillates stably before switching the CIN COUT and Clock Generation Circuit (M16C/26A, M16C/26B) 2 (M16C/26T) 2 Function , generation function (9) CIN COUT are directed for input, with no pull-ups. ...
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System clock control register 1 ( Symbol 0 0 ...
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Oscillation stop detection register ( NOTES: 1. ...
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Peripheral Clock Select Register NOTE: ...
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PLL control register NOTES: 1. Write ...
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... Figure 7.1.1 shows the examples of main clock connection circuit. IN The main clock after reset oscillates in the M16C/26A and M16C/26B, but stop in the M16C/26T. The power consumption in the chip can be reduced by setting the CM05 bit in the CM0 register to “1” (main clock oscillator circuit turned off) after switching the clock source for the CPU clock to a sub clock or on-chip oscillator clock ...
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7.2 Sub Clock The sub clock is generated by the sub clock oscillation circuit. This clock is ...
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... PLL clock to be stable, and then set the (multiplying factor set by the PLC02 to PLC00 bits in the PLC0 register) 20 MHz in M16C/26A and M16C/26T, 10 MHz PLC00 Multiplying factor MHz in M16C/26A and M16C/26T, 10 MHz Clock Generation Circuit divided used 2(ROC) PLL clock PLL clock ...
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Set the CM07 bit to “0” (main clock), the CM17 to CM16 bits to “00 (CM16 and ...
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7.5 CPU Clock and Peripheral Function Clock The CPU clock is used to operate the CPU and ...
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7.6 Power Control There are three power control modes. For convenience’ sake, all modes other than wait ...
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7.6.1.6 On-chip Oscillator Mode The selected on-chip oscillator clock divided by 1 (undivided ...
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7.6.2.3 Pin Status During Wait Mode Table 7.6.2.3.1 lists pin status during wait mode. Table 7.6.2.3.1 Pin ...
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7.6.3 Stop Mode In stop mode, all oscillator circuits are turned off, so are the CPU clock ...
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Figure 7.6.1 shows the state transition from normal operation mode to stop mode and wait mode. Figure ...
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Main clock oscillation PLL operation mode PLC07=1 CM11=1 CPU clock: f(PLL) (5) CM07=0 CM06=0 CM17=0 PLC07=0 CM16=0 ...
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Table 7.6.1. Allowed Transition and Setting High-speed mode, middle-speed mode High-speed mode, 8 middle-speed mode Low-speed mode ...
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7.7 System Clock Protective Function When the main clock is selected for the CPU clock source, this ...
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7.8.1 Operation When the CM27 bit is set to "0" (Oscillation Stop Detection Reset) When main clock ...
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7.8.3 How to Use Oscillation Stop and Re-oscillation Detect Function • The oscillation stop and re-oscillation detect ...
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... Protection Note The PRC3 bit in the PRCR register is not available in M16C/26T. In the event that a program runs out of control, this function protects the important registers so that they will not be rewritten easily. Figure 8.1 shows the PRCR register. The following lists the registers protected by the PRCR register. • ...
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... Interrupt Note The 42-pin package does not use UART0 transmission interrupt and UART0 reception interrupt of peripheral function. M16C/26T does not use voltage down detection interrupt. 9.1 Type of Interrupts Figure 9.1.1 shows types of interrupts. Software (Non-maskable interrupt) Interrupt Hardware NOTES: 1. Peripheral function interrupts are generated by the microcomputer's internal functions. ...
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9.1.1 Software Interrupts A software interrupt occurs when executing certain instructions. Software interrupts are non-maskable interrupts. ...
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9.1.2 Hardware Interrupts Hardware interrupts are classified into two types — special interrupts and peripheral function ...
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... Set these bits to “1111 LSB High address FFFFF . Table 9.2.1.1 lists the 16 16 Reference M16C/60, M16C/20 serise software maual , program ex- 16 Address match interrupt Watchdog timer Clock generating circuit Voltage detection circuit _______ NMI interrupt Reset ”. 2 ...
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... INT interrupt Serial I DMAC Key input interrupt ) 13 16 A/D convertor Serial I Timer INT interrupt ) M16C/60, M16C/ series software to manual Interrupt ...
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9.3 Interrupt Control The following describes how to enable/disable the maskable interrupts, and how to set ...
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Interrupt control register NOTES: 1.This bit can only ...
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Interrupt request cause select register NOTE: 1. When setting ...
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9.3.1 I Flag The I flag enables or disables the maskable interrupt. Setting the I flag ...
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9.4 Interrupt Sequence An interrupt sequence (the devicebehavior from the instant an interrupt is accepted to ...
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9.4.1 Interrupt Response Time Figure 9.4.1.1 shows the interrupt response time. The interrupt response or interrupt ...
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9.4.3 Saving Registers In the interrupt sequence, the FLG register and PC are saved to the ...
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The operation of saving registers carried out in the interrupt sequence is dependent on whether the ...
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9.4.4 Returning from an Interrupt Routine The FLG register and PC in the state in which ...
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Priority level of each interrupt INT1 Timer B2 Timer B0 Timer A3 Timer A1 INT3 INT2 ...
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______ 9.6 INT Interrupt _______ INTi interrupt (i triggered by the edges of ...
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______ 9.7 NMI Interrupt _______ An NMI interrupt request is generated when input on the NMI ...
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... Value of the PC that is saved to the stack area : Refer to “Saving Registers”. Op-code is an abbreviation of Operation Code portion of instruction code. Refer to Chapter 4 Instruction Code/Number of Cycles in M16C/60, M16C/20 Series Software Manual. Op-code is shown as a bold-framed figure directly below the Syntax. Table 9.9.2. Relationship Between Address Match Interrupt Sources and Associated Registers ...
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Address match interrupt enable register Address match interrupt ...
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10. Watchdog Timer The watchdog timer is the function that detects when a program is out ...
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Watchdog Timer Control Register Watchdog Timer Start Register ...
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11. DMAC Note Do not use UART0 transfer and UART0 reception interrupt request as a DMA ...
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Table 11.1 DMAC Specifications Item No. of channels Transfer memory space Maximum No. of bytes transferred (1, ...
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DMA0 request cause select register NOTE: 1. The ...
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DMA1 request cause select register NOTE: 1. The causes ...
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DMAi source pointer ( (b19) (b16)(b15) (b23 NOTE: 1. ...
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11.1 Transfer Cycles The transfer cycle consists of a memory or SFR read (source read) bus cycle ...
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(1) When the transfer unit bits and the source of transfer is ...
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11.2. DMA Transfer Cycles Any combination of even or odd transfer read and write adresses is possible. ...
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11.3 DMA Enable When a data transfer starts after setting the DMAE bit in DMiCON register ...
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11.5 Channel Priority and DMA Transfer Timing If both DMA0 and DMA1 are enabled and DMA transfer ...
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12. Timer Note The TB2IN pin is not available in the 42-pin package. Do not use ...
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1/2 • Main clock f 1 • PLL clock • On-chip 1/8 oscillator clock f f ...
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12.1 Timer A Figure 12.1.1 shows a block diagram of the timer A. Figures 12.1.2 to ...
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Timer Ai register ( (1) (b15) (b8 NOTES: 1. The ...
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One-shot start flag NOTES: 1. Make sure the ...
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12.1.1. Timer Mode In timer mode, the timer counts a count source generated internally (see Table ...
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12.1.2. Event Counter Mode In event counter mode, the timer counts pulses from an external device ...
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Timer Ai mode register (i (When not using two-phase pulse signal processing ...
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Table 12.1.2.2. Specifications in Event Counter Mode (when processing two-phase pulse signal with timers A2, A3 ...
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Timer Ai mode register (i (When using two-phase pulse signal processing ...
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12.1.2.1 Counter Initialization by Two-Phase Pulse Signal Processing This function initializes the timer count value to ...
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12.1.3. One-shot Timer Mode In one-shot timer mode, the timer is activated only once by one ...
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Timer Ai mode register (i ...
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12.1.4. Pulse Width Modulation (PWM) Mode In PWM mode, the timer outputs pulses of a given ...
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Timer Ai mode register ( ...
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Count source Input signal to TA pin iIN PWM pulse output from TA pin iOUT IR ...
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12.2 Timer B Note The TB2 pin for Timer B2 is not available in 42-pin package. IN ...
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Timer Bi mode register (i Bit symbol ...
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Timer Bi register (i=0 to 2)(1) (b15) (b8 NOTES: 1. The register must be ...
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12.2.1 Timer Mode In timer mode, the timer counts a count source generated internally (see Table 12.2.1.1). ...
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12.2.2 Event Counter Mode In event counter mode, the timer counts pulses from an external device or ...
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12.2.3 Pulse Period and Pulse Width Measurement Mode In pulse period and pulse width measurement mode, the ...
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Count source “H” Measurement pulse “L” Reload register counter transfer timing Timing at which counter reaches “0000 ...
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12.2.4 A/D Trigger Mode A/D trigger mode is used as conversion start trigger for A/D converter in ...
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Timer Bi mode register ( ...
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12.3 Three-phase Motor Control Timer Function Timers A1, A2, A4 and B2 can be used to ...
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Figure 12.3.1. Three-phase Motor Control Timer Functions Block Diagram page 118 ...
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Three-phase PWM control register 0 ( NOTES: 1. ...
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Three-phase PWM control register NOTES: 1. ...
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Three-phase output buffer register(i=0, NOTE: 1. The IDB0 and ...
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Timer Ai, Ai-1 register (i= (b15) (b8 NOTES: 1. The register ...
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Timer B2 Special Mode Register Bit ...
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(1) Timer B2 register (b15) (b8 NOTE: 1. The register must be accessed ...
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Timer Ai mode register ...
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The three-phase motor control timer function is enabled by setting the INV02 bit in the VC0 ...
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Carrier wave: sawtooth waveform Carrier wave Signal wave Timer B2 Start trigger signal for timer A4* ...
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12.3.1 Position-data-retain Function This function is used to retain the position data synchronously with the three-phase ...
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12.3.1.2 Position-data-retain Function Control Register Figure 12.3.1.2.1 shows the structure of the position-data-retain function contol register. ...
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12.3.2 Three-phase/Port Output Switch Function When the INVC03 bit in the INVC0 register set to “1”(Timer ...
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Port function control register NOTE: 1. This register is ...
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13. Serial I/O Note UART0 is not available in the 42-pin package. Serial I/O is configured ...
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(UART0) RxD 0 Clock source selection CLK1 to CLK0 1SIO or 2SIO Internal ...
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PAR 1SP disabled STPS PAR RxDi STPS=1 2SP enabled 0 0 PAR STPS=1 enabled ...
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reverse RxD data RxD2 reverse circuit Reverse 1SP STPS STPS=1 2SP 0 0 STPS=1 ...
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UARTi Transmit Buffer Register (i (b15) (b8 NOTES: 1. Use MOV ...
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UARTi transmit/receive mode register ( Bit ...
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UARTi Transmit/receive Control Rregister 0 (i ...
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UARTi Transmit/receive Control Register 1 (i= Symbol TE ...
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UART2 Special Mode Register Symbol IICM ABC ...
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UART2 special mode register NOTES: 1. The DL2 ...
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13.1.1. Clock Synchronous serial I/O Mode The clock synchronous serial I/O mode uses a transfer clock ...
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Table 13.1.1. 2. Registers to Be Used and Settings in Clock Synchronous Serial I/O Mode Register Bit ...
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Table 13.1.1.3 lists the functions of the input/output pins during clock synchronous serial I/O mode. Table ...
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(1) Example of Transmit Timing (Internal clock is selected) Transfer clock “1” UiC1 register “0” Write data ...
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13.1.1.1 Counter Measure for Communication Error Occurs If a communication error occurs while transmitting or receiving ...
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13.1.1.3 LSB First/MSB First Select Function Use the UFORM bit in the UiC0 register ( ...
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13.1.1.5 Serial data logic switch function (UART2) When the U2LCH bit in the U2C1 register is ...
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_______ _______ 13.1.1.7 CTS/RTS separate function (UART0) This function separates CTS from the P6 pin. To use ...
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13.1.2. Clock Asynchronous Serial I/O (UART) Mode The UART mode allows transmitting and receiving data after ...
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Table 13.1.2.2. Registers to Be Used and Settings in UART Mode Register Bit UiTB ...
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Table 13.1.2.3 lists the functions of the input/output pins during UART mode. Table 13.1.2.4 lists the ...
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• Example of transmit timing when transfer data is 8 bits long (parity enabled, one stop bit) ...
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• Example of receive timing when transfer data is 8 bits long (parity disabled, one stop ...
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13.1.2.2. Counter Measure for Communication Error If a communication error occurs while transmitting or receiving in UART ...
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13.1.2.4. Serial Data Logic Switching Function (UART2) The data written to the U2TB register has its ...
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_______ _______ 13.1.2.6. CTS/RTS Separate Function (UART0) This function separates CTS from the P6 pin. To use ...
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13.1.3 Special Mode bus mode is provided for use as a ...
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SDA2 Delay circuit ACKC=1 ACKD bit Noise Filter Falling edge detection SCL2 IICM=0 STSPSEL=0 UART2 IICM=1 ...
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Table 13.1.3.2. Registers to Be Used and Settings in I Register Bit U2TB ...
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Table 13.1.3.3. Registers to Be Used and Settings in I Register Bit U2SMR4 STAREQ RSTAREQ STPREQ ...
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Table 13.1.3. bus Mode Functions Clock synchronous serial I/O Function mode (SMD2 to ...
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(1) When the IICM2 bit is set to "0" (ACK or NACK interrupt) and the CKPH ...
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13.1.3.1 Detection of Start and Stop Condition Whether a start or a stop condition has been ...
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Table 13.1.3.2.1. STSPSEL Bit Functions Function Output of SCL2 and SDA2 pins Start/stop condition interrupt request ...
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13.1.3.4 Transfer Clock Data is transmitted/received using a transfer clock like the one shown in Figure ...
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13.1.3.7 ACK and NACK If the STSPSEL bit in the U2SMR4 register is set to “0” ...
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13.1.4 Special Mode 2 (UART2) Multiple slaves can be serially communicated from one master. Transfer clock ...
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Microcomputer (Master) Figure 13.1.4.1. Serial Bus Communication Control Example (UART2) page 169 ...
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Table 13.1.4.2. Registers to Be Used and Settings in Special Mode 2 Register Bit (1) U2TB ...
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13.1.4.1 Clock Phase Setting Function One of four combinations of transfer clock phases and polarities can ...
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"H" Slave control input "L" "H" Clock input "L" (CKPOL=0, CKPH=0) Clock input "H" (CKPOL=1, CKPH=0) ...
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13.1.5 Special Mode 3 (IE Bus mode )(UART2) In this mode, one bit of IE Bus ...
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(1) The ABSCS bit in the U2SMR register (bus collision detect sampling clock select) If ABSCS=0, ...
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13.1.6 Special Mode 4 (SIM Mode) (UART2) Based on UART mode, this is an SIM interface ...
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Table 13.1.6.2. Registers to Be Used and Settings in SIM Mode Register Bit (1) U2TB 0 ...
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(1) Transmit Timing Transfer Clock "1" TE bit in U2C1 register "0" TI bit in U2C1 ...
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Figure 13.1.6.2 shows the example of connecting the SIM interface. Connect T pull-up. Figure 13.1.6.2. SIM ...
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13.1.6.2 Format • Direct Format Set the PRY bit in the U2MR register to “1”, the ...
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... Conversion Speed Per Pin NOTES: 1. Not dependent on use of sample and hold function. 2. Set the AD frequency to 10 MHz or less. For M16C/26B, set MHz or less. Without sample-and-hold function, set the fAD frequency to 250kH With the sample and hold function, set the fAD frequency to 1MH ...
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CKS2=0 f 1/3 AD CKS2=1 V REF Resistor ladder VCUT VCUT=1 Successive conversion register ...
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A/D control register 0 ( NOTE the ...
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... Divided-by NOTE: 1. Set the AD frequency to 10 MHz or less (12 MHz or less in M16C/26B). The AD is selected with combinations of the CKS0 bit in the ADCON0 register, CKS1 bit in the ADCON1 register, and the CKS2 bit in the ADCON2 register. page 183 ...