M25P10-AVMN6 STMicroelectronics, M25P10-AVMN6 Datasheet
M25P10-AVMN6
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M25P10-AVMN6 Summary of contents
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... RES Instruction, One-Byte, Signature (10h), for backward compatibility More than 20 Years’ Data Retention Packages – ECOPACK® (RoHS compliant) June 2006 1 Mbit, low voltage, Serial Flash memory with 50MHz SPI bus interface Rev 7 M25P10 SO8 (MN) 150 mil width VFQFPN8 (MP) (MLP8) 1/49 www.st.com ...
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... Active Power, Standby Power and Deep Power-Down Modes . . . . . . . . . 11 4.5 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.6 Protection Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.7 Hold Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.1 Write Enable (WREN 6.2 Write Disable (WRDI 6.3 Read Identification (RDID 6.4 Read Status Register (RDSR 6.4.1 6.4.2 6.4.3 6.4.4 6.5 Write Status Register (WRSR 2/49 WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 WEL bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 BP1, BP0 bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SRWD bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 M25P10-A ...
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... M25P10-A 6.6 Read Data Bytes (READ 6.7 Read Data Bytes at Higher Speed (FAST_READ 6.8 Page Program (PP 6.9 Sector Erase (SE 6.10 Bulk Erase (BE 6.11 Deep Power-down (DP 6.12 Release from Deep Power-down and Read Electronic Signature (RES Power-up and Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 9 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters ...
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... AC Characteristics (50MHz Operation, Device Grade Table 21. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 22. VFQFPN8 (MLP8) 8-lead Very thin Fine Pitch Quad Flat Package No lead, Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 23. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 24. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 4/49 M25P10-A ...
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... M25P10-A List of figures Figure 1. Logic Diagram Figure 2. SO and VFQFPN Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Bus Master and memory devices on the SPI Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4. SPI Modes Supported Figure 5. Hold Condition Activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 6. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 7. Write Enable (WREN) Instruction Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 8. Write Disable (WRDI) Instruction Sequence Figure 9 ...
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... Summary description 1 Summary description The M25P10 Mbit (128K x 8) Serial Flash Memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction. The memory is organized as 4 sectors, each containing 128 pages. Each page is 256 bytes wide ...
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... M25P10-A Table 1. Signal Names HOLD Serial Clock Serial Data Input Serial Data Output Chip Select Write Protect Hold Supply Voltage Ground Summary description 7/49 ...
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... To start the Hold condition, the device must be selected, with Chip Select (S) driven Low. 2.6 Write Protect (W) The main purpose of this input signal is to freeze the size of the area of memory that is protected against program or erase instructions (as specified by the values in the BP1 and BP0 bits of the Status Register). 8/49 M25P10-A ...
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... M25P10-A 3 SPI modes These devices can be driven by a microcontroller with its SPI peripheral running in either of the two following modes: CPOL=0, CPHA=0 CPOL=1, CPHA=1 For these two modes, input data is latched in on the rising edge of Serial Clock (C), and output data is available from the falling edge of Serial Clock (C). ...
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... SPI modes Figure 4. SPI Modes Supported CPOL CPHA 10/49 MSB M25P10-A MSB AI01438B ...
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... M25P10-A 4 Operating features 4.1 Page Programming To program one data byte, two instructions are required: Write Enable (WREN), which is one byte, and a Page Program (PP) sequence, which consists of four bytes plus data. This is followed by the internal Program cycle (of duration t To spread this overhead, the Page Program (PP) instruction allows up to 256 bytes to be programmed at a time (changing bits from 1 to 0), provided that they lie in consecutive addresses on the same page of memory ...
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... The environments where non-volatile memory devices are used can be very noisy. No SPI device can operate correctly in the presence of excessive noise. To help combat this, the M25P10-A features the following data protection mechanisms: Power On Reset and an internal timer (t changes while the power supply is outside the operating specification. ...
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... M25P10-A 4.7 Hold Condition The Hold (HOLD) signal is used to pause any serial communications with the device without resetting the clocking sequence. However, taking this signal Low does not terminate any Write Status Register, Program or Erase cycle that is currently in progress. To enter the Hold condition, the device must be selected, with Chip Select (S) Low. ...
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... Control Logic Address Register and Counter 14/49 Address Range 18000h 10000h 08000h 00000h High Voltage Generator I/O Shift Register 256 Byte Data Buffer 18000h 10000h 08000h 00000h 256 Bytes (Page Size) X Decoder M25P10-A 1FFFFh 17FFFh 0FFFFh 07FFFh Status Register 1FFFFh 000FFh ...
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... M25P10-A 6 Instructions All instructions, addresses and data are shifted in and out of the device, most significant bit first. Serial Data Input (D) is sampled on the first rising edge of Serial Clock (C) after Chip Select (S) is driven Low. Then, the one-byte instruction code must be shifted in to the device, most significant bit first, on Serial Data Input (D), each bit being latched on the rising edges of Serial Clock (C) ...
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... Bytes 06h 0 0 04h 0 0 9Fh 0 0 05h 0 0 01h 0 0 03h 3 0 0Bh 3 1 02h 3 0 D8h 3 0 C7h 0 0 B9h ABh AI02281E M25P10-A Data Bytes 256 ...
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... M25P10-A 6.2 Write Disable (WRDI) The Write Disable (WRDI) instruction The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the instruction code, and then driving Chip Select (S) High. The Write Enable Latch (WEL) bit is reset under the following conditions: Power-up ...
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... Read Identification (RDID) Instruction Sequence and Data-Out Sequence High Impedance Q 18/49 Figure 9 Memory Type 20h Instruction Manufacturer Identification MSB M25P10-A Device Identification Memory Capacity 11h Device Identification MSB AI06809b ...
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... M25P10-A 6.4 Read Status Register (RDSR) The Read Status Register (RDSR) instruction allows the Status Register to be read. The Status Register may be read at any time, even while a Program, Erase or Write Status Register cycle is in progress. When one of these cycles is in progress recommended to check the Write In Progress (WIP) bit before sending a new instruction to the device ...
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... Instructions Figure 10. Read Status Register (RDSR) Instruction Sequence and Data-Out Sequence High Impedance Q 20/ Instruction Status Register Out MSB Status Register Out MSB M25P10-A 7 AI02031E ...
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... M25P10-A 6.5 Write Status Register (WRSR) The Write Status Register (WRSR) instruction allows new values to be written to the Status Register. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction has been decoded and executed, the device sets the Write Enable Latch (WEL) ...
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... Memory Content Unprotected (1) Protected Area Protected against Ready to accept Page Program, Page Program Sector Erase and and Sector Erase Bulk Erase instructions Protected against Ready to accept Page Program, Page Program Sector Erase and and Sector Erase Bulk Erase instructions M25P10-A (1) Area Table 2. ...
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... M25P10-A 6.6 Read Data Bytes (READ) The device is first selected by driving Chip Select (S) Low. The instruction code for the Read Data Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being latched-in during the rising edge of Serial Clock (C). Then the memory contents, at that ...
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... High Impedance Dummy Byte DATA OUT MSB , during the falling edge of Serial Clock (C DATA OUT MSB M25P10 MSB AI04006 ...
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... M25P10-A 6.8 Page Program (PP) The Page Program (PP) instruction allows bytes to be programmed in the memory (changing bits from 1 to 0). Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch (WEL). ...
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... Data Byte 2 Data Byte MSB Data Byte MSB Data Byte 256 MSB M25P10 AI04082B ...
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... M25P10-A 6.9 Sector Erase (SE) The Sector Erase (SE) instruction sets to 1 (FFh) all bits inside the chosen sector. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch (WEL) ...
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... The Bulk Erase (BE) instruction is executed only if both Block Protect (BP1, BP0) bits are 0. The Bulk Erase (BE) instruction is ignored if one, or more, sectors are protected. Figure 16. Bulk Erase (BE) Instruction Sequence 28/49 Figure 16 Instruction D M25P10 initiated. While the AI03752D ...
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... M25P10-A 6.11 Deep Power-down (DP) Executing the Deep Power-down (DP) instruction is the only way to put the device in the lowest consumption mode (the Deep Power-down mode). It can also be used as a software protection mechanism, while the device is not in active use this mode, the device ignores all Write, Program and Erase instructions. ...
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... Deep Power-down mode. The instruction can also be used to read, on Serial Data Output (Q), the 8-bit Electronic Signature, whose value for the M25P10-A is 10h. Except while an Erase, Program or Write Status Register cycle is in progress, the Release from Deep Power-down and Read Electronic Signature (RES) instruction always provides access to the 8-bit Electronic Signature of the device, and can be applied even if the Deep Power-down mode has not been entered ...
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... Sequence and Data-Out Sequence Instruction D High Impedance Q 1. The value of the 8-bit Electronic Signature, for the M25P10-A, is 10h. Figure 19. Release from Deep Power-down (RES) Instruction Sequence High Impedance ...
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... Power On Reset CC , all operations are disabled and the device does not respond WI VSL – all operations are disabled, and WI threshold. However, the WI is still below V CC (min), the device can be CC delay is not yet fully elapsed. M25P10-A is less CC (min). CC supply. CC ...
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... M25P10-A Figure 20. Power-up Timing (max (min) Reset State of the Device V WI Table 8. Power-Up Timing and V Symbol ( VSL CC (1) t Time delay to Write instruction PUW (1) V Write Inhibit Voltage (Device Grade 6) WI (1) V Write Inhibit Voltage (Device Grade ...
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... Absolute Maximum Ratings Symbol T Storage Temperature STG V Input and Output Voltage (with respect to Ground Supply Voltage CC V Electrostatic Discharge Voltage (Human Body model) ESD 1. JEDEC Std JESD22-A114A (C1=100 pF, R1=1500 , R2=500 ) 34/49 Parameter (1) M25P10-A Min. Max. Unit –65 150 °C –0.6 4.0 V –0.6 4.0 V –2000 2000 V ...
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... M25P10 and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters ...
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... 0.9.V at 50MHz 0.9.V at 20MHz – 0.5 0.3V 0. 1.6mA = –100µA V –0.2 CC M25P10-A Unit pF pF Max. Unit ± 2 µA ± 2 µA 50 µA 5 µ +0 0 ...
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... M25P10-A Table 15. DC Characteristics (Device Grade 3) Symbol I Input Leakage Current LI I Output Leakage Current LO I Standby Current CC1 I Deep Power-down Current CC2 I Operating Current (READ) CC3 I Operating Current (PP) CC4 I Operating Current (WRSR) CC5 I Operating Current (SE) CC6 I Operating Current (BE) CC7 V Input Low Voltage ...
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... Test conditions specified in Parameter Write Status Register Cycle Time Page Program Cycle Time (256 Bytes) Page Program Cycle Time (n Bytes) Sector Erase Cycle Time Bulk Erase Cycle Time Table 10 and Table 12 (1) (2) Min. Typ. Max 1.5 0.4+ n*1.1/256 1 4.5 10 M25P10-A (2) Unit ...
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... M25P10-A Table 18. AC Characteristics (25MHz Operation, Device Grade Symbol Alt ( CLH ( CLL (2) t CLCH (2) t CHCL t t SLCH CSS t CHSL t t DVCH DSU t t CHDX DH t CHSH t SHCH t t SHSL CSH ( SHQZ ...
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... Signature Read C (1) Table 10 and Table 12 Min. Typ. Max. D. 0.1 0 100 100 1 M25P10-A Unit MHz MHz ns ns V/ns V/ µs (6) µs (6) µs ...
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... M25P10-A Table 20. AC Characteristics (50MHz Operation, Device Grade 6) 50MHz available only in products with Process Technology code X Symbol Alt ( CLH ( CLL (3) t CLCH (3) t CHCL t t SLCH CSS t CHSL t t DVCH DSU t t CHDX DH t CHSH ...
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... DC and AC parameters Figure 22. Serial Input Timing S tCHSL C tDVCH D Q Figure 23. Write Protect Setup and Hold Timing during WRSR when SRWD=1 W tWHSL 42/49 tSLCH tCHDX MSB IN High Impedance High Impedance M25P10-A tSHSL tCHSH tSHCH tCHCL tCLCH LSB IN tSHWL AI07439 ...
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... M25P10-A Figure 24. Hold Timing HOLD Figure 25. Output Timing S C tCLQV tCLQX tCLQX Q ADDR. D LSB IN tHLCH tCHHL tCHHH tHLQZ tCH tCLQV tQLQH tQHQL DC and AC parameters tHHCH tHHQX AI02032 tCL tSHQZ LSB OUT AI01449e 43/49 ...
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... GAUGE PLANE SO-A inches Typ Min 0.004 0.049 0.011 0.007 0.193 0.189 0.236 0.228 0.154 0.150 0.050 – 0.010 0° 0.016 0.041 M25P10-A Max 0.069 0.010 0.019 0.009 0.004 0.197 0.244 0.157 – 0.020 8° 0.050 ...
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... M25P10-A Figure 27. VFQFPN8 (MLP8) 8-lead Very thin Fine Pitch Quad Flat Package No lead, Package Outline Drawing is not to scale. 2. The circle in the top view of the package indicates the position of pin 1. Table 22. VFQFPN8 (MLP8) 8-lead Very thin Fine Pitch Quad Flat Package No lead, ...
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... ST Sales Office. The category of second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. 46/49 M25P10 (2) . M25P10 ...
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... M25P10-A 13 Revision history Table 24. Document revision history Date Revision 25-Feb-2001 12-Sep-2002 13-Dec-2002 21-Feb-2003 24-Nov-2003 08-Mar-2005 01-Apr-2005 01-Aug-2005 1.0 Document written VFQFPN8 package (MLP8) added. Clarification of descriptions of 1.1 entering Standby Power mode from Deep Power-down mode, and of terminating an instruction sequence or data-out sequence Typical Page Program time improved. Write Protect setup and hold times specified, for applications that switch Write Protect to exit the Hardware 1 ...
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... SO8 Narrow package specifications updated (see Table 21). Changes Table 17, Table 18 and Table 23). modified and added. in Table 14: DC CC3 6). shows preliminary data. and Table 22). Note 2 added below Figure 27. V parameter for Device WI Threshold. scheme. Table 18 and Table 19. Figure 26 M25P10-A and ...
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... M25P10-A Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...