CS3810 Amphion Semiconductor Ltd., CS3810 Datasheet - Page 3

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CS3810

Manufacturer Part Number
CS3810
Description
32 Qam Demodulator
Manufacturer
Amphion Semiconductor Ltd.
Datasheet
RESTART
INPUT DATA
ZIFMT
ZA
ZB
AGC SETTING
AGCREF
BLL SETTINGS
VCORNG
HBWBLL
FFKBLL
LFFKBLL
LCKTHBLL
LCKWINBLL
Name
Table 1: CS3810 32 QAM Demodulator Interface Signal Descriptions
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
Width
10
10
1
1
8
1
1
2
2
1
1
Synchronous reset signal, active HIGH. The BLL restart the acquisition
process after it is activated. The CLL returns to idle state after RESTART
and re-starts acquisition until the BLL lock is achieved.
Input sample format, static programming signal
0: two's complement
1: offset binary
Input sample A from DAC, 2x symbol rate (74MHz), format is determined
by ZIFMT
Input sample B from DAC, 2x symbol rate (74MHz), format is determined
by ZIFMT
AGC threshold reference, static programming signal
VCO frequency range selection, static programming signal, specifying
the corresponding Df/f0 of the VCO when the 12-bit control signal VCOV
changes from the middle to the maximal or minimal value
0: 1/8192
1: 1/4092
The actual Df/f0 of the VCO may not be necessarily accurate as the
specified and the BLL can still be functioning. It only affects the BLL
acquisition range and speed.
Costas low pass filter H(f) gain factor selection, static programming sig-
nal
0: 1/32
1: 1/16
Frequency error low pass filter gain factor selection before the BLL lock
is declared, static programming signal
00: 1/2048
01: 1/1024
10: 1/512
11: 1/256
Frequency error low pass filter gain factor selection, after the BLL lock is
declared, static programming signal
00: 1/16384
01: 1/8192
10: 1/4096
11: 1/2048
BLL Lock threshold selection, relative to the lock indicator value for ideal
signal, static programming signal
0: 1/2
1: ¾
BLL lock detection window size selection, in terms of number of 32-QAM
symbols, static programming signal
0: 16384
1: 32768
Description
3
TM

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