CS3810 Amphion Semiconductor Ltd., CS3810 Datasheet - Page 5

• Manufacturer Part Number: CS3810
• Description: 32 Qam Demodulator
• Manufacturer: Amphion Semiconductor Ltd.

ERROR CORRECTION STATISTICS
TCMERR
RSERR_U
RSERR_L
AGC CONTROL
AGCP
VCO CONTROL
VCOV
VCSTRB
ERROR CORRECTION CONTROL
RSERRPRD
UPTCM
BYPASS
LOCK STATUS
AGCOK
LCKBLL
LCKCLL
STATCLL
FIFOERROR
LCKTCM
LCKUW
Name
Table 1: CS3810 32 QAM Demodulator Interface Signal Descriptions
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
I/O
Width
16
16
16
12
1
1
2
8
1
1
1
1
3
1
1
1
Reports the number of estimated errors in the decoded IQ datastream
Reports the number of errors corrected by the Reed Solomon Decoder
(upper 16 bits)
Reports the number of errors corrected by the Reed Solomon Decoder
(lower 16 bits)
AGC width-modulated pulse with period of 256 symbols. The pulse width
is proportional to the input signal level.
VCO control voltage, 12-bit offset-binary format, normalized according to
the VCO frequency range such that the maximal value corresponds to
the lowest frequency and zero corresponds to the highest frequency,
updated every four symbols (9.25 MHz, 8 clock cycles)
VCO control voltage strobe, asserted for 4 cycles in every 8 clock cycles
to indicate the update of VCOV
Static signal-sets the duration over which RS statistics are gathered
Static signal used to control operation of TCM decoder
Static signal, when asserted the TCM decoder is bypassed
AGC OK indicator, asserted when the average peak sample level is
within +/-15% of the ideal level
BLL lock flag, asserted when lock is declared or retained, updated once
every BLL lock detection window
CLL lock flag, asserted when lock is declared or retained, updated for
every output symbol (two clock cycles)
CLL status, updated for every output symbol (two clock cycles)
000: idle (equalizer in initial mode, phase error set to 0)
001: initial (equalizer in CMA, phase error set to 0)
010: AFC (equalizer in CMA, estimate frequency offset)
011: DFS (equalizer in CMA, scan counter increases)
100: 4GC pull-in (equalizer in CMA, CLL 4GC pull-in)
110: DD pull-in (equalizer in CMA, CLL DD pull-in)
111: Lock (equalizer in DD, CLL DD tracking)
When Asserted signifies the output fifo has overflowed and data has
been dropped
When asserted signifies the TCM decoder has achieved lock
When asserted signifies that block synchronization has been achieved
Description
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