A3992SBT- Allegro MicroSystems, Inc., A3992SBT- Datasheet - Page 4

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A3992SBT-

Manufacturer Part Number
A3992SBT-
Description
DMOS Dual Full-Bridge Microstepping PWM Motor Driver
Manufacturer
Allegro MicroSystems, Inc.
Datasheet
A3992
ELECTRICAL CHARACTERISTICS
Output Drivers
Load Supply Voltage Range
Output Leakage Current
Output On Resistance
Body Diode Forward Voltage
Motor Supply Current
Logic Supply Current
Control Logic
Logic Supply Voltage Range
Logic Input Voltage
Logic Input Current
Input Hysteresis
Minimum sleep pulse width
OSC input frequency
OSC input duty cycle
Internal Oscillator
DAC Accuracy
Reference Input Voltage Range
Reference Buffer Offset
Reference Divider Ratio
Reference Input Current
Internal Reference Voltage
Comparator Input Offset Volt.
G
Propagation Delay Times
Crossover Dead Time
UVLO Enable Threshold
UVLO Hysteresis
Protection Circuitry
Overcurrent Protection Threshold
Overcurrent Blanking
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
1
2
individual units, within the specifi ed maximum and minimum limits.
3
4
Negative current is defi ned as coming out of (sourcing) the specifi ed device pin.
Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for
V
OCP is tested at T
M
ERR
Error
= [(V
3
REF
Characteristic
/ Range) – V
A
= 25°C in a restricted range and guaranteed by characterization.
SENSE
] / (V
4
1
REF
valid at T
/ Range).
V
REF
V
Symbol
V
R
f
UVLOHYS
I
V
T
V
V
OSC(in)
V
V
OCPST
REFINT
I
I
I
f
t
V
V
V
I
DS(on)
V
t pd
I
IN(1)
IN(0)
OSC
/V
UVLO
DSS
V
I
REF
t
OCP
JHYS
T
A
IN(1)
IN(0)
DAC
ERR
BB
DD
t
DT
DD
OS
BB
S
IO
= 25°C, V
F
J
SENSE
Operating, I
During Sleep mode
V
V
Source driver, I
Sink driver, I
Source diode, I
Sink diode, I
f
Operating, outputs disabled
Sleep or Idle mode
f
Outputs off
Idle mode (Word 1, D18 = 0)
Sleep mode
Operating
V
V
Divide by 1 (Word 2, D13=0, D14=1)
OSC shorted to GND
R
Measured relative to REF buffer output
Word 0, D18 = 0, D17 = 1, V
Word 0, D18 = 1, D17 = 1, V
V
V
Internal V
Internal V
Internal V
Internal V
50% to 90%; PWM change to source on
50% to 90%; PWM change to source off
50% to 90%; PWM change to sink on
50% to 90%; PWM change to sink off
V
PWM
PWM
BB
OUT
OUT
IN
IN
REF
REF
DD
OSC
= 0.8 V
= 50 V, f
= 2.0 V
rising
= 51 kΩ
< 50 kHz
< 50 kHz
= V
= 0 V
= 2.0 V
= 0 V
BB
REF
REF
REF
REF
OUT
PWM
OUT
F
Microstepping PWM Motor Driver
, Range = 8, DAC = 63
, Range = 8, DAC = 31
, Range = 4, DAC = 63
, Range = 4, DAC = 15
= 1.5 A
OUT
F
Test Conditions
= ±1.5 A
= 1.5 A
< 50 kHz, unless otherwise noted
= -1.5 A
= -1.5 A
REF
REF
= 0.5 to 2.6 V
=0.5 to 2.6 V
DMOS Dual Full-Bridge
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
1.940
Min.
0.20
–0.5
0.05
–10
500
500
300
4.5
2.0
> 2
2.5
3.4
7.4
3.6
3.9
15
40
–5
–6
–9
–6
35
35
.5
0
3
2
1
<–1.0
<–2.0
Typ.
<1.0
0.54
0.54
<1.0
±0.5
0.10
±10
800
800
650
165
2.0
4.2
15
5
4
4
8
4
0
0
0
0
0
2
2.060
Max.
1000
1000
0.40
4.45
–50
100
–20
250
250
900
0.6
0.6
1.2
1.2
1.5
5.5
0.8
4.6
2.6
8.8
4.4
0.5
50
50
50
20
12
10
20
60
10
8
6
6
5
5
6
9
6
3
Units
MHz
MHz
MHz
LSB
mV
mV
mA
mA
mA
mA
mA
μA
μA
μA
μA
μA
μA
μA
μs
ns
ns
ns
ns
ns
μs
°C
°C
%
%
%
%
%
Ω
Ω
V
V
V
V
V
V
V
V
V
V
V
V
A
4

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