A3992SLP-T Allegro MicroSystems, Inc., A3992SLP-T Datasheet - Page 11

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A3992SLP-T

Manufacturer Part Number
A3992SLP-T
Description
DMOS Dual Full-Bridge Microstepping PWM Motor Driver
Manufacturer
Allegro MicroSystems, Inc.
Datasheet
A3992
STROBE
SENSE1
CLOCK
OUT1B
OUT1A
VBB1
DATA
GND
GND
VCP
CP1
CP2
Terminal List Table
Package
6, 7, 18, 19
10
11
12
1
2
3
4
5
6
7
8
9
B Package
10
11
12
13
14
15
16
17
20
21
22
23
24
B
1
2
3
4
5
8
9
Number
Package
7, 18
3, 23
24
23
22
21
20
19
18
17
16
15
14
13
LP
19
20
21
22
24
10
11
12
13
14
15
16
17
1
2
4
5
6
8
9
OSC
SLEEP
VREG
OUT2B
VBB2
GND
GND
SENSE2
OUT2A
VDD
MUX
REF
Device Pin-out Diagrams
STROBE
SENSE1
SENSE2
CLOCK
Name
OUT1B
OUT1A
OUT2A
OUT2B
SLEEP
VREG
VBB1
VBB2
DATA
GND
MUX
VDD
OSC
VCP
CP1
CP2
REF
PAD
NC
Reservoir capacitor terminal
Charge pump capacitor terminal
Charge pump capacitor terminal
DMOS Full Bridge 1, output B
Load supply
Ground. On B package, internally fused to the die pad
for enhanced thermal dissipation.
Sense resistor terminal for Full Bridge 1
DMOS Full Bridge 1, output A
Logic input
Logic input
Logic input
G
Not used
Logic supply
DMOS Full Bridge 2, output A
Sense resistor terminal for Full Bridge 2
Load supply
DMOS Full Bridge 2, output B
Internal regulator
Logic input
Oscillator input
No connection
Exposed thermal pad for enhanced thermal dissipation.
m
reference input
Microstepping PWM Motor Driver
Pin Description
DMOS Dual Full-Bridge
STROBE
SENSE1
SENSE2
CLOCK
OUT1A
OUT2A
DATA
GND
MUX
VDD
REF
NC
10
11
12
1
2
3
4
5
6
7
8
9
LP Package
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
PAD
24
23
22
21
20
19
18
17
16
15
14
13
VBB1
NC
OUT1B
CP2
CP1
VCP
GND
OSC
SLEEP
VREG
OUT2B
VBB2
11

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