PM5380-BI PMC-Sierra, Inc., PM5380-BI Datasheet - Page 58

• Manufacturer Part Number: PM5380-BI
• Description: Network Interface, SATURN User Network Interface (8x155) Telecom Standard Product
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
9.9
9.10 Power and Ground
Analog Signals
Pin Name
TRSTB
Pin Name
APREF0
APREF1
ATB[0]
ATB[1]
Pin Name
QAVD
QAVS
AVD[0]
AVD[1]
AVD[2]
AVD[3]
AVD[4]
AVD[5]
AVD[6]
AVD[7]
AVD[8]
Type
Type
Analog
Analog
Type
Power
Ground
Analog
Power
Input
Analog
Analog
Pin
No.
Pin
No.
AH17
AH18
P5
R5
Pin
No.
U5
V3
N2
P3
P1
R2
R1
U1
U4
V4
W1
C17
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Function
The active-low test reset (TRSTB) signal provides an
asynchronous S/UNI-8x155 test access port reset via the
IEEE P1149.1 test access port. TRSTB is a Schmitt
triggered input with an integral pull-up resistor.
Note that when not being used, TRSTB may be tied low or
connected to the RSTB input.
Function
The APSO transmit reference (APREF0 and APREF1)
analog pins are provided to create calibrated currents for the
PECL output transceivers APS[1:0]+/-. See the High Speed
PECL Interfaces and APS sections for more details.
A 1.07 Kohm resistor is connected across the APREF0 and
APREF1 pins when the APSI[1:0]+/- and APSO[1:0]+/- are
terminated with one termination network.
A 2.15 Kohm resistor is connected across the APREF0 and
APREF1 pins when the APSO[1:0]+/- terminated using two
termination networks.
The receive and transmit analog test ports (ATB[1:0]). These
pins are used for manufacturing testing only and should be
tied to the analog ground plane (AVS).
Function
The quiet power (QAVD) pin for the analog core. QAVD
should be connected to well-decoupled analog +3.3V supply.
Please see the Operation section for detailed information.
The quiet ground (QAVS) pin for the analog core. QAVS
should be connected to analog ground of the QAVD supply.
Please see the Operation section for detailed information.
The analog power (AVD[8:0]) pins for the analog core. The
AVD pins should be connected through passive filtering
networks to a well-decoupled +3.3V analog power supply.
Please see the Operation section for detailed information.
Released
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