S1M8656A Samsung Semiconductor, Inc., S1M8656A Datasheet - Page 17

• Manufacturer Part Number: S1M8656A
• Description: Cdma/amps Dual Mode If/ Baseband Ic
• Manufacturer: Samsung Semiconductor, Inc.

RX IF/BBA WITH AGC
The advantage of using the SPI bus is the opportunity given to use all the various functions in the product, thus
allowing more flexibility. Moreover, by tieing all the products using a common bus and controlling them together,
the PCB application area and the number of control pins for the master can be simultaneously reduced, as
compared to controlling the products independently.
Serial Port Interface Operation
The modem, the master, controls slaves such as S1M8656A using the SPI bus.
The STB falling edge indicates the start of the serial I/F data transmission. The STB becomes high to mark the
end of the data transmission.
(Data sent after the STB turns high are not valid.)
Serial line data is captured and stored as soon as the BBA or the MODEM places the clock on the falling edge.
The SPI 3-line must remain high for at least 1-clock cycle in order to sent new data.
The MSB always outputs the data line data.
After 9-clocks, which is required to send data, the data line driver opens the data line, at which time the data line
becomes high because of the external pull-up resistance.
Serial Data Transfer format
S1M8656A and S1M8657 are all slave devices with the SPI bus. What differentiate them from one another is
their different device IDs. Each company has its own characteristic SPI bus configuration , but normally the 3-line
bus is most often used and sometimes the 2-line bus such as the IIC bus.
Figure 11. shows the serial data transfer format.
(1)
(2)
(3)
(4)
(5)
(6) The following high 1-BIT data is a dummy data.
(7) The following 8-BIT data is the data in the device to be driven.
DATA
Start bit
STB
CLK
The first 2-BITs are for transmission only and this product must send '01'.(Others are not permitted.)
The following 6-bit data specifies the slave device, which is connected to the SPI bus and has its own ID.
The following 1-bit is a dummy bit, which marks the end of the 8-bit data transmission and the beginning of
the next data to be sent.
The following 1-bit decides on whether the master will drive the data line or the slave will. If this bit is '1', the
master will drive , but if '0' the slave will drive the data line.
The following 7-bit data is the register address of the specified slave device; the 7-bits for an address allows
128 register addresses for slaves.
mode=01
D5 D4 D3 D2 D1 D0
Slave Address
Master drive
1=Master read
Dummy
D6 D5 D4 D3 D2 D1 D0
Master drive
Figure 11. Serial Data Transfer Format
Register
Address
Dummy
D7 D6 D5 D4 D3 D2 D1 D0
Slave drive
0=Master read
data
Dummy
D6 D5 D4 D3 D2 D1 D0
Master drive
Register
Address
Dummy
D7 D6 D5 D4 D3 D2 D1 D0
Master drive
data
Dummy
S1M8656A
End bit
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