S1M8660A Samsung Semiconductor, Inc., S1M8660A Datasheet
S1M8660A
Related parts for S1M8660A
S1M8660A Summary of contents
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... IF frequency processing, basband processing , and digital interface. The receiver IC (S1M8660A)and transmitter IC (S1M8657) are provided as a KIT. S1M8660A is a receiver IC, installed with a Rx AGC, Baseband Converter, Baseband analog filter, and A-D Converter. It can send a digital baseband signal to the digital baseband IC. ...
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... S1M8660A (Preliminary) BLOCK DIAGRAM TCXO SLOTB CRX_IF1 CRX_IF2 RAGC_CONT F/GRX_IF1 F/GRX_IF2 SPI SEN Control 2 TCXO/N CHIPX8 CDMA LPF GPS LPF FM LPF 0 Div CDMA LPF GPS LPF FM VCO LPF RX IF/BBA WITH GPS I_OFS TCXO/N CHIPX8 4-Bit RXID[2] - [3] ADC(P) 4-Bit RXQD[0] - [3] ADC(P) ...
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... RXQD[0] GND VDDM RXID[3] RXID[2] FMRID/RXID[1] FMRQD/RXID[ S1M8660A 43 (Top View S1M8660A (Preliminary VDDA 24 GND 23 RXVCO_T2 22 RXVCO_T1 21 VDDA 20 GND 19 GND 18 VDDA 17 GND 16 VDDA 15 VDDA ...
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... When this is not used, it remains at Low. AI Control DC input for removing the DC offset generated in the S1M8660A and system during CDMA and AMPS Mode. The control DC is generated in the modem in PDM form, passes through the R-C filter and is converted to DC, which is sent to this input terminal. ...
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... Power source for a logic circuit, related to the digital input /output, connected to an external digital logic such as the modem. AI Analog circuit ground. Pin-18 is N.C. in the product. DI Digital logic circuit ground. - This pin is used for internal testing only and is not connected to anything. S1M8660A (Preliminary) Description 5 ...
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... S1M8660A (Preliminary) ABSOLUTE MAXIMUM RATINGS Characteristic Power supply Storage temperature Operating temperature Storage temperature Electrostatic discharge rating RECOMMENDED OPERATING CONDITIONS Characteristic Power supply Ambient operating temperature ELECTRICAL CHARACTERISTICS Electrical Characteristics(V = 3.3V Characteristic Current consumption Current consumption Current consumption Current consumption ...
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... IMD based on 2 jammer signals. One in-band signal(@50kHz,0.5*F/S) and two jammers(@900kHz, 22dB*F/S and @1.7MHz, 21dB*F/S)are simultaneously input. AGC control voltage is controlled so that ADC output is F/S when the input signal is -80dBm. Test Conditions S1M8660A (Preliminary) Symbol Min Typ Max VCSEN -102 - ...
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... S1M8660A (Preliminary) AC CHARACTERISTICS (Continued) Characteristic Single-tone Overall gain reduction due to one jammer. jammer desense The in-band signal at -97dBm (control the AGC control voltage to 0.5*F/S)and the jammer signal at 900kHz and -57dBm are simultaneously input. Residual Sideband RSB Linear Gain Mismatch : Phase Mismatch in Deg. ...
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... I/Q offset control Offset adjust - input impedance Out-band 45kHz attenuation 60MHz Residual Sideband RSB Linear Gain Mismatch : Phase Mismatch in Deg. Test Conditions cos log cos S1M8660A (Preliminary) Symbol Min Typ Max Fin - - 250 NFmin - - 7 NFmid - - 12 NFmax - - 58 IIP3max - IIP3min -25 - ...
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... S1M8660A (Preliminary) AC CHARACTERISTICS (Continued) Characteristic Gain flatness Amount of gain change along I and Q paths between 1kHz to 615kHz IF VCO perormance VCO and VCO external time constant and PLL value buffered output frequency range VCO phase noise Tank LC's Q value should be above 20. Measure @100kHz away from the mid- frequency ...
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... CHIPx8 : > 20ns Figure 1. CDMA / GPS Receive ADC Timing output delay after clock falling edge: <50ns 12pF, FMCLK=360kHz, FMSTB=40kHz. load Figure 2. FM Receive ADC Timing S1M8660A (Preliminary) Falling time 90% 10% Valid data Falling time: Rising time: 3 -12ns 3 - 12ns 90% 10% ...
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... S1M8660A (Preliminary) Clock period: 0.6 - 10us Clock duty cycle 65% CLK STB line setup time STB All data transitions happen while CLK=Low DATA Valid data bit (N) TCXO period: 50.8ns TCXO TCXO/N STRONG Rise time: 3 -12ns OUTPUT TCXO/N WEAK OUTPUT 12 Clcok N Clcok N+1 DATA line hold time: ...
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... C. CDMA Receive Signal Path S1M8660A is composed of a receive circuit, installed with TCXO/N, CHIP 8 like clock generator, mode conversion switch and serial I/F apparatus. The receive circuit has the Rx AGC, an automatic gain controller, and baseband LPF and output terminal with the A-D converter, and VCO and mixer etc. The input signal is received as a differential signal, which is modulated to 1.23 MHz spread-spectrum for CDMA. The mid-frequency is 220.38MHz for Korea-PCS, 1.23MHz for US-PCS, and 85.38MHz for cellular ...
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... FM Rx Signal Path S1M8660A FM signal path is the same as that of the CDMA with the exception of a different LPF and A-D converter, which meet the system specification. Basically a FM modulated signal between IF mid-frequency to 15kHz is input so that the baseband LPF, unlike CDMA, has the 12kHz cut-off frequency characteristic. A-D Converter has 8-bit resolution, characteristic of AMPS, and processing speed of approx ...
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... While GPS receiving path shares function blocks with FM and CDMA modes, it needs independent low pass filter. GPS IF signal from GPS RF-IF mixer is applied to S1M8660A via GPS SAW filter. Because both outputs of FM SAW filter and GPS SAW filter are generally single ended signals, differential input pins of FM AGC are designed to be shared with GPS block ...
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... S1M8660A (Preliminary) Rx Low-Pass Filters The CDMA baseband signal frequency can range between 1kHz to 630kHz. Normally, the range between 1kHz to 615kHz is called the In-band, between 630kHz to 750kHz Band-edge, and anything outside of these ranges out band. Very precise characteristics are required in the in-band range. The ripple, I/Q gain-phase error are critical factors that lead to noise in the in-band ...
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... RX IF/BBA WITH GPS +1.5 +0.5 -1.5 -4.0 -46.0 -48.0 1K 750K 800K 1.1M 1.3M 1.7M Frequency [Hz] Figure 10. GPS Rx Low Pass Filter Mask S1M8660A (Preliminary) 17 ...
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... The serial I/F can be used by setting pin 26(SEN) high, the pin which permits/ not permit the SPI. If the SEN becomes low, the SPI cannot be used and the S1M8660A must be used DC control mode. (All the internal registers are default value) In GPS mode, for the compatibility with the former products designed to be uncontrollable with DC control ...
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... RX IF/BBA WITH GPS S1M8660A can be used to power down the TCXO/N block using the SPI bus when the CDMA is asleep (CDMA SLEEP). This mode, installed to minimize the product consumption power, is entered by setting a specific bit (PWRDWN) in the CLK_GEN_MODE register to '1'. The current in the sleep mode reduces from 300uA to 10uA. The SEN(PIN26) pins decide on whether the product will used the SPI bus or parallel control inputs ...
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... S1M8660A (Preliminary) Serial Data Transfer format S1M8660A and S1M8657 are all slave devices with the SPI bus. What differentiate them from one another is their different device IDs. Each company has its own characteristic SPI bus configuration , but normally the 3-line bus is most often used and sometimes the 2-line bus such as the IIC bus. Figure 13. shows the serial data transfer format ...
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... RX IF/BBA WITH GPS Modes of Operation S1M8660A can be controlled by existing DC control inputs such as S1M8656A or by the SPI bus. The modes of DC operation consists of state FMB, IDLEB, and SLEEPB modes; Table 2 shows the various modes. In GPS mode, it can be controlled only by SPI bus. Table 2. Mode control in the DC control mode ...
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... R/W CLK_GEN_ 0x09 R/W MODE FILTER_SEL 0x0A R/W AGC_DCONV 0x0C R/W Reserved 0x10 - 0x15 W : MODEM is recorded in the S1M8660A register R : When S1M8660A sends data to the modem Address Name Type 00(h) RESET 01(h) SPI_ID 22 Table 3. S1M8660A Control Registers Default vale W - Reset. Reset S1M8660A and all the register values are returned to their default value ...
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... CDMA Mode, regardless of the SLOTB state. 09(h) CLK_GEN_ MODE [4:0] 0A(h) FILT_SEL [1:0] Type Bits [7] Identifies the S1M8660A 0 = S1M8656A S1M8660A [6:3] Default = 0111 Reserved Registers R/W [2] FMB. Default = 1 1: CDMA Mode Mode CDMA Mode or FM Mode select bit. [1] IDLEB. Default = 0 1: RxTx Mode, 0: Idle Mode Talk Mode or idle Mode select bit. ...
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... S1M8660A (Preliminary) Table 4. Description Of Control Registers (Continued) Address Name 0C(h) AGC_RVCO [7:5], [2:0] 24 Type Bits [7] GPS_SEL, Default = 0 [6:5] AGCPDM. Default=00. AGC PDM control range 00: PDM 3.3V : Use when VDDM = 3.3V 01: PDM 2.4V : Use when VDDM = 2.4V 10: PDM 2.7V : Use when VDDM = 2.7V 11: Reserved : not allowed. Reserved bit for changes to PDM voltage according to the MODEM power voltage BIT ...
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... Figure 14. CDMA Rx Gain/Phase Mismatch Specification 100 -105 -100 -95 -90 Figure 15. CDMA Rx Mode Noise Figure Specification Region of Acceptable Mismatch Performance 0.4 0.6 0.8 Gain Mismatch [dB] -85 -80 -75 -70 -65 -60 -55 -50 IF Input Power [dBm] S1M8660A (Preliminary) 1.0 1.2 1.4 Region of Acceptable NF Quality Performance -45 -40 -35 -30 -25 -20 -15 -10 25 ...
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... Figure 17. S1M8660A IF VCO Open Loop Phase Noise 26 -80 -75 -70 -65 -60 -55 -50 IF Input Power [dBm] Figure 16. CDMA Rx Mode IIP3 Specification 100 1K Frequency offset(Hz) RX IF/BBA WITH GPS -45 -40 -35 -30 -25 -20 -15 -10 ...
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... Figure 18 Gain/Phase Mismatch Specification -100 -95 -90 -85 Figure 19 Mode Noise Figure Specification Region of Acceptable Mismatch Performance 0.2 0.3 0.4 Gain Mismatch [dB] -80 -75 -70 -65 -60 -55 -50 -45 -40 IF Input Power [dBm] S1M8660A (Preliminary) 0.5 0.7 0.6 Region of Acceptable NF Quality Performance -35 -30 -25 -20 -15 - ...
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... S1M8660A (Preliminary) CHARACTERISTIC GRAPH (Continued) 0 -10 Region of Acceptable IIP3 Quality Performance -20 -30 -40 -50 -60 -100 -95 -90 -85 -80 28 -75 -70 -65 -60 -55 -50 -45 -40 IF Input Power [dBm] Figure 20 Mode IIP3 Specification RX IF/BBA WITH GPS Upper Limit -35 -30 -25 -20 -15 -10 -5 ...
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... Figure 21. GPS Rx Gain/Phase Mismatch Specification -100 -95 -90 -85 -80 -75 -70 Region of Acceptable Mismatch Performance 0.4 0.6 0.8 Gain Mismatch [dB] -65 -60 -55 -50 IF Input Power [dBm] Figure 22. GPS Rx Mode Noise Specification S1M8660A (Preliminary) 1.0 1.2 Region of Acceptable NF Quality Performance -45 -40 -35 -30 -25 -20 -15 -10 -5 1.4 29 ...
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... S1M8660A (Preliminary) CHARACTERISTIC GRAPH (Continued) 0 -10 Region of Acceptable IIP3 Quality Performance -20 -30 -40 -50 -60 -100 -95 -90 -85 -80 30 -75 -70 -65 -60 -55 -50 -45 -40 IF Input Power [dBm] Figure 23. GPS Rx Mode IIP3 Specification RX IF/BBA WITH GPS Upper Limit -35 -30 -25 -20 -15 -10 -5 ...
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... S1M8660A 5 6 VCOIN 10nF 10nF 12 100nH 47pF 1uF 1pF 10nF 1nF 1SV279 10K Figure 24. Test Circuit S1M8660A (Preliminary) CHIPX8 E_CHIPX8 SW_CHIP TCXO/N 1nF TCXO_IN 36 35 10nF SLEEPB SW_SLP 32 FMB SW_FM 31 IDLEB 30 SW_IDL SLOTB SW_S 29 T R=22K ...
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... S1M8660A (Preliminary) PACKAGE DEMENSION 48BCC+ Package Outline #37 #1 Index Laser Mark #1 #37 Pin 1 #1 0.045 + 0.10 0.045 + 0.10 32 7.00 + 0.10 #25 #13 6.15 TYP 5.0 TYP 0.045 #25 0.30 + 0.10 0.50 TYP #13 6.15 TYP RX IF/BBA WITH GPS 0.075 + 0.025 + 0.10 0.045 + 0.10 ...