HV732 Supertex, Inc., HV732 Datasheet
HV732
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HV732 Summary of contents
Page 1
... The HV732 has built-in damping for faster RTZ waveform capability, and high voltage MOSFET gate-clamping function for quick ramping of the output voltage amplitude. The HV732 consists of a control logic circuit, level translators, MOSFET gate drive buffers, clamp circuits, and high current, high voltage MOSFETs as the ultrasound transmitter pulser output stage ...
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... 1.0, No cap 2.0 5.0 μ +100V 140 180 μ +100V -1.0 -3.0 μ +100V HV732 Pad 1 Pad 2 Pad 44-Lead QFN (K6) (top view Lot Number YY = Year Sealed WW = Week Sealed A = Assembler Country of Origin = “Green” Packaging 44-Lead QFN (K6) = -5.0V 25° ...
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... 100 KΩ -100μA GS -13 -2.0μA GS 0.5 - 0.8 V --- -1 -1.0mA 200 0V HV732 = -5.0V 25° -100V, , All other inputs Low -5.0V 25° -25V DS = -1. -25V 1Mhz DS = -25V DS = -1. -25V 1Mhz DS = -25V DS = -1. -25V 1Mhz DS ...
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... Conditions - 26 30 Ω 100mA DMPO - 15 30 Ω -100mA DMPO - 0 --- - -0 --- Min Typ Max Units Conditions - 100 - mA --- - 60 80 Ω --- - 0V Min Typ Max Units Conditions - --- - 25 50 Ω --- - 0V HV732 = 25V 25V 1Mhz DS = 25V 1.0Mhz DS = 25V 1.0Mhz DS ...
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... P 75Ω to 0V, 10nF GATE DR See timing diagram 75Ω to 0V, 10nF GATE DR See timing diagram. ns μs All power supplies up and stable Other inputs inactive EN = Low V and and SUB HV732 = +12V -12V. NN ...
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... HV732 Test Circuit +3.3V 20MHz 3V 0-P -5V HV732 TX Switching Time Test +3.3V VLL EN PIN NIN 20MHz 3V 0-P CLAMP DAMP VLN AGND -5V +100V +12V 10nF 10Ω VLL AVDD VDD PDR PGATE EN PIN NIN HV732 CLAMP DAMP VLN AGND GND NDR NGATE DMPO 0Ω 10nF 10nF +100V ...
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... HV732 Timing Diagram 30µs EN PIN NIN PDR NDR VPP HVOUT VNN DAMP 2mA IAVDD 0.175mA Truth Table Logic Control Inputs CLAMP DAMP 1us 1.5mA Gate Drive Output ...
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... HV732 TX Switching Time Diagram NIN 50% PIN HVOUT HV732 DAMP Switching Time Diagram 50% DAMP V PP DAMPOUT HV732 Clamp Switching Time Diagram 50% CLAMP t CLPOFF(P) HVOUT 50% 50% t DMPON(N) t DMPOFF(N) 90% 10 50% 50% t CLPON(P) t CLPOFF( 90% 10 90% ...
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... Positive voltage supply of low voltage logic (+1.8V to +5V) 44 NIN Input logic control of the high voltage N-DMOS pin 15 & 16 (TXN), High = on, Low = off Note: The three thermal slabs on the bottom of the package must be externally connected PAD1 to VSUB, PAD2 to TXN, and PAD3 to TXP. 9 HV732 ...
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... Dimension 0.20 NOM 0.90 0.02 (mm) REF MAX 1.00 0.05 Drawings not to scale. (The package drawing(s) in this data sheet may not refl ect the most current specifi cations. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-HV732 A041408 θx4 Seating A3 Plane L1 Note 2 ...