ADT7473 Analog Devices, Inc., ADT7473 Datasheet - Page 11

• Manufacturer Part Number: ADT7473
• Description: Dbcool Remote Thermal Monitor And Fan Controller
• Manufacturer: Analog Devices, Inc.

SERIAL BUS INTERFACE
On PCs and servers, control of the ADT7473 is carri
using the SMBus. The ADT7473 is connected to this bus as a
slave device, under the control of a master controller, which is
usually (but not necessarily) the ICH.
The ADT7473 has a fixed 7
or 0x2E. The read/write bit must be added to get the 8-bit
address (01011100 or 0x5C). Data is sent over the serial bus in
sequences of nine clock pulses: eight bits of data followed by an
acknowledge b
line must oc
remain stab
transition w
signal. The nu
the serial bus in a single
by what the master and slave
When all dat
are established. In write mode, the master pulls the data line
high during the tenth clock pulse
rea mode, the master device overrides the acknowledge b
pulling the data line high during the low period before the
ninth
ma er takes the data line low during the low period be
ten
ass t a stop condition.
An number of bytes of data can be transferred over the se
bu n one operation, but it is not possible to mix read and
in one operation, because the type of operation is determine
the beginning and cannot subsequently be changed without
starting a new operation.
s i
er
d
y
st
th
clock pulse, and then high during th
clock pulse; this is kn
SDA
SCL
le during the high period, because a low-to-high
hen the clock is high might be interpreted as a stop
cur during the low period of the clock signal and
a bytes have been read or written, stop conditions
START BY
MASTER
mber of data bytes that can be transmitted over
it from the slave device. Transitions on the data
Figur
1
0
read or write operation is limited only
e 14. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
own as No Acknowledge. The
-bit serial bus address of 0101110
1
devices can handle.
SERIAL BUS ADDRESS BYTE
to assert a stop condition. In
0
1
FRAME 1
e tenth clock pulse to
SDA (CONTINUED)
1
SCL (CONTINUED)
1
ed out
fore the
0
it by
rial
write
d at
Rev. A | Page 11 of 76
R/W
ADT7473
ACK. BY
D7
9
1
D7
D6
1
In t e ADT7473, write operations c
byt , and read operations contain on
one of the device data registers or read data from it, the add
po ter register must be set so the correct data register is
address
read from it. The first byte of a write operation always cont
an address that is stored in the address pointer register. If data is
written to the d
byte that is written to the register selected by the address
pointer register.
This write operation is shown in Figure 14. The device address
is sent over the bus, and then R/ W
by two data bytes. The first data byte is the address of the
internal data register to be written to, which is stored in the
address pointer register. The second data byte is the data to be
written to the internal data register.
When reading data from a register, there are two possibilities:
•
•
in
es
h
D6
D5
If the ADT7473’s address pointer register value is unknown
or not the desired value, it must first be set to the correct
value before data can be read from the desired data register.
This is done by performing a write to the ADT7473, but
only the data byte containing the register address is sent,
because no data is written to the register. This is shown in
Figure 15.
A read operation is then performed consisting of the serial
bus address, R/ W bit set to 1, followed by the data byte
read from the data register. This is shown in Figure 16.
If the address pointer register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the address pointer
register, as shown in Figure 16.
ed, and then da
ADDRESS POINTER REGISTER BYTE
D5
D4
DATA BYTE
FRAME 3
D4
evice, the write operation contains
D3
FRAME 2
D3
D2
ta can be written into that register or
D2
D1
D1
D0
ACK. BY
ADT7473
is set to 0. This is followed
ontain either one or two
D0
e byte. To write data to
9
ACK. BY
ADT7473
STOP BY
MASTER
9
ADT7473
a second data
ains
ress