HY27UG162G5A Hynix Semiconductor, HY27UG162G5A Datasheet - Page 16
HY27UG162G5A
Manufacturer Part Number
HY27UG162G5A
Description
2gb Nand Flash
Manufacturer
Hynix Semiconductor
Datasheet
1.HY27UG162G5A.pdf
(42 pages)
Preliminary
HY27UG162G5A Series
2Gbit (128Mx16bit) NAND Flash
4. OTHER FEATURES
4.1 Data Protection for Power on/off Sequence
The device is designed to offer protection from any involuntary program/erase during power-transitions. An internal
voltage detector disables all functions whenever Vcc is below about 2.0V (3.3V version). WP pin provides hardware
protection and is recommended to be kept at VIL during power-up and power-down. A recovery time of minimum 10us
is required before internal circuit gets ready for any command sequences as shown in Figure 22. The two-step com-
mand sequence for program/erase provides additional software protection.
If the power is dropped during the ready read/write/erase operation, Power protection function may not guaranteed
the data. Power protection function is only available during the power on/off sequence.
4.2 Ready/Busy.
The device has a Ready/Busy output that provides method of indicating the completion of a page program, erase,
copy-back, cache program and random read completion. The R/B pin is normally high and goes to low when the device
is busy (after a reset, read, program, erase operation). It returns to high when the P/E/R controller has finished the
operation. The pin is an open-drain driver thereby allowing two or more R/B outputs to be Or-tied. Because pull-up
resistor value is related to tr(R/B) and current drain during busy (Ibusy), an appropriate value can be obtained with
the following reference chart (Figure 23). Its value can be determined by the following guidance.
Rev 0.0 / Sep. 2006
16