NCV8141 ON Semiconductor, NCV8141 Datasheet - Page 9

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NCV8141

Manufacturer Part Number
NCV8141
Description
5v, 500ma Linear Regulator With Enable, /reset, And Watchdog
Manufacturer
ON Semiconductor
Datasheet

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regulator and control features: RESET, ENABLE and
WATCHDOG, provides a single IC solution for a
microprocessor power supply. The reset delay, reset
duration and watchdog frequency limit are all determined by
a single capacitor. For a particular microprocessor the
overriding requirement is usually the reset delay (also
known as power on reset). The capacitor is chosen to meet
this requirement and the reset duration and watchdog
frequency follow.
tolerance due to the regulator.
and 586 ms.
to the capacitor.
13.5 ms.
time. From a programmers point of view, time is more useful
since they must ensure that a watchdog signal is issued
consistently several times per second.
The NCV8141 with its unique integration of linear
The reset delay is given by:
Assume that the reset delay must be 200 ms minimum.
From the NCV8141 data sheet the reset delay has a $37%
Assume the capacitor tolerance is $10%.
Closest standard value is 0.82 mF.
Minimum and maximum delays using 0.82 mF are 220 ms
The duration of the reset pulse is given by:
This has a tolerance of ±50% due to the IC, and ±10% due
The duration of the reset pulse ranges from 3.69 ms to
The watchdog signal can be expressed as a frequency or
The watchdog time is given by:
There is a tolerance of ±20% due to the NCV8141.
t POR (min) + (4.75
T WDI(RESET) (typ) + (1.0
t POR(typ) + (4.75
NCV8141 DESIGN EXAMPLE
C DELAY (min) +
t WDI + (1.3
C DELAY (min) + 0.743 mF
10 5
10 5 )C DELAY
0.63)
2.69
t POR (min)
10 5) C DELAY
10 4)
10 5
C DELAY
C DELAY
APPLICATION NOTES
http://onsemi.com
0.9
NCV8141
9
arrives at least every 76 ms.
regulator with integrated microprocessor control features.
Using the NCV8141 as indicated in Figure 13, the
microprocessor can control its own power down sequence.
The momentary contact switch quickly charges C1 through
R1.
threshold), the output switches on and V
After a delay period determined by C
programmable reset pulse train is generated at the reset
output. The pulse train continues until the correct watchdog
signal appears at the WDI lead. C1 is now left to discharge
through the input impedance of the enable lead
(approximately 150 kW) and the enable signal disappears.
The output voltage remains at 5.0 V as long as the NCV8141
continues to receive the correct watchdog signal.
its watchdog signal. When the microprocessor finishes its
housekeeping or power down software routine, it stops
sending a watchdog signal. In response, the regulator
generates a reset signal and goes into a sleep mode where
V
Hz
ms
FAIL
OUT
ENERGY CONSERVATION AND SMART FEATURES
With a capacitor tolerance of ±10%:
The software must be written so that a watchdog signal
Energy conservation is another benefit of using a
When the voltage across C1 reaches 3.95 V ( the enable
The microprocessor can power itself down by terminating
Figure 12. WDI Signal for C
drops to 0 V, shutting down the microprocessor.
t WDI + (1.3
t WDI + (1.3
141
7
t WDI + 141 ms (max)
t WDI + 76 ms (min)
10 5 )
10 5 )
NCV8141
13
76
0.8
1.2
Delay
0.9
1.1
= 0.82 mF using
PASS
Delay
OUT
C DELAY
C Delay
, a frequency
rises to 5.0 V.

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