EMC2302 Standard Microsystems Corp., EMC2302 Datasheet - Page 13

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EMC2302

Manufacturer Part Number
EMC2302
Description
Rpm-based Pwm Fan Controller
Manufacturer
Standard Microsystems Corp.
Datasheet
Dual RPM-Based PWM Fan Controller
Datasheet
SMSC EMC2302
3.1.5
3.1.6
3.1.7
3.2
3.2.1
START
1 -> 0
YYYY_YYYb
SMBus Stop Bit
The SMBus Stop bit is defined as a transition of the SMBus Data line from a logic ‘0’ state to a logic
‘1’ state while the SMBus clock line is in a logic ‘1’ state. When the EMC2302 detects an SMBus Stop
bit has been communicating with the SMBus protocol, it will reset its client interface and prepare to
receive further communications.
SMBus Time-out
The EMC2302 includes an SMBus timeout feature. Following a 30ms period of inactivity on the
SMBus, the device will time-out and reset the SMBus interface.
The SMBus timeout feature is disabled by default and can be enabled via clearing the DIS_TO bit in
the Configuration register (20h).
SMBus and I
The major difference between SMBus and I
information refer to the SMBus 2.0 specification.
1. Minimum frequency for SMBus communications is 10kHz (I
2. The slave protocol will reset if the clock is held low for longer than 30ms (I
3. The slave protocol will reset if both the clock and data lines are held high for longer than 150us.
4. I
5. The Block Read and Block Write protocols are only compliant with I
The EMC2302 is SMBus 2.0 compatible and supports Send Byte, Read Byte, Receive Byte and Write
Byte as valid protocols as shown below. It will respond to the Alert Response Address protocol but is
not in full compliance.
All of the below protocols use the convention in
of YYYY_YYYb should be replaced with the respective SMBus addresses.
Write Byte
The Write Byte is used to write one byte of data to the registers as shown below
ADDRESS
SMBus Protocols
SLAVE
not support SMBus formatting for Block Read and Block Write protocols.
2
C devices do not support the Alert Response Address functionality (which is optional for SMBus).
WR
0
2
C Compliance
# of bits sent
DATA SENT
ACK
TO DEVICE
Table 3.2 Write Byte Protocol
0
Table 3.1 Protocol Format
DATASHEET
REGISTER
ADDRESS
XXh
13
2
DATA SENT TO
# of bits sent
C devices is highlighted here. For complete compliance
THE HOST
Table
3.1. When reading the protocol blocks, the value
ACK
0
2
C has no minimum frequency).
REGISTER
DATA
XXh
2
C data formatting. They do
2
C has no timeout).
Revision 1.2 (03-22-10)
Table
ACK
0
3.2.
0 -> 1
STOP

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