EMC2302 Standard Microsystems Corp., EMC2302 Datasheet - Page 37

• Manufacturer Part Number: EMC2302
• Description: Rpm-based Pwm Fan Controller
• Manufacturer: Standard Microsystems Corp.

Dual RPM-Based PWM Fan Controller
Datasheet
SMSC EMC2302
5.16
5.17
ADDR
ADDR
3Ch
3Dh
4Ch
4Dh
3Ah
3Bh
4Ah
4Bh
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
The Fan Drive Fail Band Registers store the number of tach counts used by the Fan Drive Fail
detection circuitry. This circuitry is activated when the fan drive setting high byte is at FFh. When it is
enabled, the actual measured fan speed is compared against the target fan speed. These registers
are only used when the FSC is active.
This circuitry is used to indicate that the target fan speed at full drive is higher than the fan is actually
capable of reaching. If the measured fan speed does not exceed the target fan speed minus the Fan
Drive Fail Band Register settings for a period of time longer than set by the DRIVE_FAIL_CNTx[1:0]
bits, then the DRIVE_FAIL status bit will be set and an interrupt generated.
The TACH Target Registers hold the target tachometer value that is maintained by the RPM-based
Fan Speed Control Algorithm.
The value in the TACH Target Registers will always reflect the current TACH Target value.
If one of the algorithms is enabled, setting the TACH Target Register to FFh will disable the fan driver
(set the fan drive setting to 0%). Setting the TACH Target to any other value (from a setting of FFh)
will cause the algorithm to invoke the Spin Up Routine after which it will function normally.
Fan Drive Fail Band Registers
TACH Target Registers
R
TACH Target
TACH Target
TACH Target
TACH Target
Fan 1 Drive
Fan 2 Drive
1 High Byte
2 High Byte
REGISTER
REGISTER
1 Low Byte
2 Low Byte
Fan 1 Drive
Fan 2 Drive
High Byte
High Byte
Fail Band
Fail Band
Fail Band
Fall Band
Low Byte
Low Byte
Table 5.26 Fan Drive Fail Band Registers
4096
4096
4096
4096
Table 5.27 TACH Target Registers
B7
B7
16
16
16
16
2048
2048
2048
2048
B6
B6
DATASHEET
8
8
8
8
1024
1024
1024
1024
B5
B5
37
4
4
4
4
512
512
512
512
B4
B4
2
2
2
2
256
256
256
256
B3
B3
1
1
1
1
128
128
128
128
B2
B2
-
-
-
-
B1
B1
64
64
64
64
-
-
-
-
Revision 1.2 (03-22-10)
B0
B0
32
32
32
32
-
-
-
-
DEFAULT
DEFAULT
F8h
FFh
F8h
FFh
00h
00h
00h
00h