LMX2430 National Semiconductor Corporation, LMX2430 Datasheet

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LMX2430

Manufacturer Part Number
LMX2430
Description
Pllatinum Dual High Frequency Synthesizer For Rf Personal Communications
Manufacturer
National Semiconductor Corporation
Datasheet

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© 2003 National Semiconductor Corporation
LMX2430/LMX2433/LMX2434
PLLatinum
Personal Communications
LMX2430 3.0 GHz/0.8 GHz
LMX2433 3.6 GHz/1.7 GHz
LMX2434 5.0 GHz/2.5 GHz
General Description
The LMX243x devices are high performance frequency syn-
thesizers with integrated dual modulus prescalers. The
LMX243x devices are designed for use as RF and IF local
oscillators for dual conversion radio transceivers.
A 32/33 or a 16/17 prescale ratio can be selected for the 5.0
GHz LMX2434 RF synthesizer. An 8/9 or a 16/17 prescale
ratio can be selected for both the LMX2430 and LMX2433
RF synthesizers. The IF circuitry contains an 8/9 or a 16/17
prescaler. Using a proprietary digital phase locked loop tech-
nique, the LMX243x devices generate very stable, low noise
control signals for RF and IF voltage controlled oscillators.
Both the RF and IF synthesizers include a two-level pro-
grammable charge pump. Both the RF and IF synthesizers
have dedicated Fastlock circuitry with integrated timeout
counters. Furthermore, only a single word write is required to
power up and tune the synthesizers to a new frequency.
Serial data is transferred to the devices via a three-wire
interface (DATA, LE, CLK). A low voltage logic interface
allows direct connection to 1.8V devices. Supply voltages
from 2.25V to 2.75V are supported . The LMX243x family
features low current consumption:
LMX2430 (3.0 GHz/ 0.8 GHz) — 2.8 mA/ 1.4 mA, LMX2433
(3.6 GHz/ 1.7 GHz) — 3.2 mA/ 2.0 mA, LMX2434 (5.0 GHz/
2.5 GHz) — 4.6 mA/ 2.4 mA at 2.50V.
The LMX243x devices are available in 20-Pin TSSOP and
20-Pin UTCSP surface mount plastic packages.
PLLatinum
Thin Shrink Small Outline Package (MTC20)
is a trademark of National Semiconductor Corporation.
Dual High Frequency Synthesizer for RF
DS200535
20053580
Features
n Low Current Consumption
n 2.25V to 2.75V Operation
n Selectable Synchronous or Asynchronous Powerdown
n Selectable Dual Modulus Prescaler:
n Programmable Charge Pump Current Levels
n Fastlock
n Digital Filtered Lock Detect Output
n Analog Lock Detect Output (supports both Push-Pull
n 1.8V MICROWIRE Logic Interface
n Available in 20-Pin TSSOP and 20-Pin UTCSP
Applications
n Mobile Handsets
n Cordless Handsets
n Wireless Data
n Cable TV Tuners
Mode
and Open Drain configurations)
RF and IF: 1 or 4 mA
(GSM, GPRS, W-CDMA, CDMA, PCS, AMPS, PDC,
DCS)
(DECT, DCT)
LMX2430
LMX2433
LMX2434
LMX243x
Ultra Thin Chip Scale Package (SLE20A)
Technology with Integrated Timeout Counters
IF: 8/9 or 16/17
RF: 8/9 or 16/17
RF: 8/9 or 16/17
RF: 16/17 or 32/33
20053581
www.national.com
May 2003

Related parts for LMX2430

LMX2430 Summary of contents

Page 1

... Supply voltages from 2.25V to 2.75V are supported . The LMX243x family features low current consumption: LMX2430 (3.0 GHz/ 0.8 GHz) — 2.8 mA/ 1.4 mA, LMX2433 (3.6 GHz/ 1.7 GHz) — 3.2 mA/ 2.0 mA, LMX2434 (5.0 GHz/ 2.5 GHz) — 4.6 mA/ 2 2.50V. The LMX243x devices are available in 20-Pin TSSOP and 20-Pin UTCSP surface mount plastic packages ...

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Functional Block Diagram Note: 1 (2) refers to Pin # 1 of the 20-Pin UTCSP and Pin # 2 of the 20-Pin TSSOP www.national.com 2 20053501 ...

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Connection Diagrams Ultra Thin Chip Scale Package (SLE) (Top View) Pin Descriptions Pin No. Pin No. Pin Name UTCSP TSSOP 1 2 GND 2 3 FinIF CPoutIF 5 6 ENosc 6 7 OSCout/ FLoutIF 7 ...

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Pin Descriptions (Continued) Pin No. Pin No. Pin Name UTCSP TSSOP 10 11 FLoutRF 11 12 GND 12 13 CPoutRF 13 14 GND 14 15 FinRF 15 16 FinRF * 16 17 Vcc CLK 19 ...

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... Ordering Information Model Temperature Range LMX2430TM -40˚C to +85˚C LMX2430TMX -40˚C to +85˚C LMX2430SLEX -40˚C to +85˚C LMX2433TM -40˚C to +85˚C LMX2433TMX -40˚C to +85˚C LMX2433SLEX -40˚C to +85˚C LMX2434TM -40˚C to +85˚C LMX2434TMX -40˚C to +85˚C LMX2434SLEX -40˚C to +85˚C ...

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... RF_P Bit = 0 RF_P Bit = 1 RF_P Bit = 0 RF_P Bit = 1 RF_P Bit = 8/9 (Note 16/17 (Note 32/33 (Note 4) LMX2430/33 2.25V ≤ Vcc ≤ 2.75V (Note 5) LMX2434 2.35V ≤ Vcc ≤ 2.75V (Note 5) 6 (Note 1) +2.25V to +2.75V ) −40˚C to +85˚C A ...

Page 7

... RF Charge Pump Output Current CPoutRF %V Magnitude Variation Vs Charge Pump CPoutRF Output Voltage I RF Charge Pump Output Current CPoutRF %T Magnitude Variation Vs Temperature A IF SYNTHESIZER PARAMETERS f IF Operating LMX2430 FinIF Frequency LMX2433 LMX2434 Divider Range Divider Range Phase Detector Frequency COMPIF p ...

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Electrical Characteristics Vcc = EN = 2.5V, −40˚C ≤ T ≤ +85˚C, unless otherwise specified A Symbol Parameter IF SYNTHESIZER PARAMETERS I IF Charge Pump Output TRI-STATE CPoutIF TRI Current I IF Charge Pump Output Sink Current CPoutIF %MIS Vs ...

Page 9

... Hz bandwidth. The offset frequency, f, must be chosen sufficiently smaller than the PLL’s loop bandwidth, yet large enough to avoid substantial phase noise contribution from the reference source the value selected for the feedback divider and f detector comparison frequency. Note 11: The synthesizer phase noise is measured with the LMX2430TM/LMX2430SLE Evaluation boards and the HP8566B Spectrum Analyzer. (Continued) Conditions ...

Page 10

Charge Pump Current Specification Definitions = Vcc − ∆ Charge Pump Sink Current at V CPout I2 = Charge Pump Sink Current Vcc//2 CPout = ∆ Charge Pump Sink Current at V CPout ...

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... Typical Performance Characteristics Sensitivity LMX2430 FinRF Input Power Vs Frequency Vcc = EN = 2.25V LMX2430 FinRF Input Power Vs Frequency Vcc = EN = 2.75V 11 20053592 20053593 www.national.com ...

Page 12

Typical Performance Characteristics Sensitivity (Continued) www.national.com LMX2433 FinRF Input Power Vs Frequency Vcc = EN = 2.25V LMX2433 FinRF Input Power Vs Frequency Vcc = EN = 2.75V 12 20053594 20053595 ...

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Typical Performance Characteristics Sensitivity (Continued) LMX2434 FinRF Input Power Vs Frequency Vcc = EN = 2.35V LMX2434 FinRF Input Power Vs Frequency Vcc = EN = 2.75V 13 20053596 20053597 www.national.com ...

Page 14

... Typical Performance Characteristics Sensitivity (Continued) www.national.com LMX2430 FinIF Input Power Vs Frequency Vcc = EN = 2.25V LMX2430 FinIF Input Power Vs Frequency Vcc = EN = 2.75V 14 20053598 20053599 ...

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Typical Performance Characteristics Sensitivity (Continued) LMX2433 FinIF Input Power Vs Frequency Vcc = EN = 2.25V LMX2433 FinIF Input Power Vs Frequency Vcc = EN = 2.75V 15 200535A0 200535A1 www.national.com ...

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Typical Performance Characteristics Sensitivity (Continued) www.national.com LMX2434 FinIF Input Power Vs Frequency Vcc = EN = 2.25V LMX2434 FinIF Input Power Vs Frequency Vcc = EN = 2.75V 16 200535A2 200535A3 ...

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Typical Performance Characteristics Sensitivity (Continued) LMX243x OSCin Input Voltage Vs Frequency Vcc = EN = 2.25V LMX243x OSCin Input Voltage Vs Frequency Vcc = EN = 2.75V 17 200535A4 200535A5 www.national.com ...

Page 18

Typical Performance Characteristics Charge Pump www.national.com LMX243x RF Charge Pump Sweeps Vcc = EN = 2.50V −40˚C ≤ T ≤ +85˚C A LMX243x IF Charge Pump Sweeps Vcc = EN = 2.50V −40˚C ≤ T ≤ +85˚ 200535A6 ...

Page 19

Typical Performance Characteristics Input Impedance LMX243x UTCSP FinRF Input Impedance Vcc = EN = 2.50V +25˚C A LMX243x UTCSP FinIF Input Impedance Vcc = EN = 2.50V +25˚C A LMX243x TSSOP FinRF Input Impedance Vcc = ...

Page 20

Typical Performance Characteristics Input Impedance (Continued) LMX243x UTCSP OSCin Input Impedance Vs Frequency LMX233xU TSSOP OSCin Input Impedance Vs Frequency www.national.com Vcc = EN = 2.50V T = +25˚C A Vcc = EN = 2.50V T = +25˚ ...

Page 21

LMX243x UTCSP FinRF Input Impedance Table Vcc = EN = 2.50V +25˚ |Γ| FinRF (MHz) 100 0.86 200 0.86 300 0.85 400 0.84 500 0.83 600 0.82 700 0.82 800 0.81 900 0.80 1000 0.80 1100 ...

Page 22

LMX243x UTCSP FinRF Input Impedance Table Vcc = EN = 2.50V +25˚ |Γ| FinRF (MHz) 4900 0.84 5000 0.84 5100 0.84 5200 0.84 5300 0.84 5400 0.84 5500 0.83 5600 0.83 5700 0.82 5800 0.82 5900 ...

Page 23

LMX243x TSSOP FinRF Input Impedance Table Vcc = EN = 2.50V +25˚ |Γ| FinRF (MHz) 100 0.86 200 0.85 300 0.84 400 0.83 500 0.82 600 0.82 700 0.82 800 0.82 900 0.81 1000 0.80 1100 ...

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LMX243x TSSOP FinRF Input Impedance Table Vcc = EN = 2.50V +25˚ |Γ| FinRF (MHz) 4900 0.75 5000 0.75 5100 0.76 5200 0.77 5300 0.78 5400 0.78 5500 0.76 5600 0.73 5700 0.71 5800 0.68 5900 ...

Page 25

LMX243x UTCSP FinIF Input Impedance Table Vcc = EN = 2.50V +25˚ |Γ| FinIF (MHz) 100 0.87 200 0.86 300 0.85 400 0.84 500 0.83 600 0.83 700 0.82 800 0.81 900 0.80 1000 0.79 1100 ...

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LMX243x TSSOP FinIF Input Impedance Table Vcc = EN = 2.50V +25˚ |Γ| FinIF (MHz) 100 0.87 200 0.86 300 0.85 400 0.84 500 0.84 600 0.83 700 0.83 800 0.82 900 0.81 1000 0.80 1100 ...

Page 27

LMX243x UTCSP OSCin Input Impedance Table Vcc = EN = 2.50V +25˚ OSCin (MHz) Re {ZOSCin} Im {ZOSCin} (Ω) 5.0 5032.01 7.5 2529.17 10.0 1412.10 12.5 1051.18 15.0 710.63 17.5 545.87 20.0 442.32 22.5 314.15 25.0 ...

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LMX243x TSSOP OSCin Input Impedance Table Vcc = EN = 2.50V +25˚ OSCin (MHz) Re {ZOSCin} (Ω) 5.0 1111.30 7.5 628.81 10.0 359.99 12.5 284.12 15.0 203.53 17.5 134.32 20.0 109.85 22.5 80.56 25.0 69.37 27.5 ...

Page 29

... The block diagram above illustrates the setup required to measure the LMX243x device’s RF charge pump sink cur- rent. The same setup is used for the LMX2430TM Evaluation Board. The purpose of this test is to assess the functionality of the RF charge pump. The IF charge pump is evaluated in the same way ...

Page 30

... OSCin pins are all tied to Vcc. The N value is typically set to 10000 in CodeLoader, i.e. RF_B word = 156 and RF_A word = 16 for RF_P bit = 0 (LMX2434) or RF_P bit = 1 (LMX2430 and LMX2433). The feedback divider output is routed to the Ftest/LD pin by selecting the RF_N/2 Fre- quency word (MUX[3:0] word = 15) in CodeLoader. A Uni- versal Counter is connected to the Ftest/LD pin and used to monitor the output frequency of the feedback divider ...

Page 31

... The block diagram above illustrates the setup required to measure the LMX243x device’s OSCin buffer sensitivity level. The same setup is used for the LMX2430TM Evalua- tion Board. This setup is similar to the FinRF sensitivity setup except that the signal generator is now connected to the OSCin pin and both Fin pins are tied to Vcc. The 51Ω ...

Page 32

... LMX243x FinRF Input Impedance Test Setup The block diagram above illustrates the setup required to measure the LMX243x device’s RF input impedance. The same setup is used for the LMX2430TM Evaluation Board. Measuring the device’s input impedance facilitates the de- sign of appropriate matching networks to match the PLL to ...

Page 33

LMX243x Serial Data Input Timing Notes: 1. DATA is clocked into the 24-bit shift register on the rising edge of CLK 2. The MSB of DATA is shifted in first. 33 20053510 www.national.com ...

Page 34

... The LMX2434 RF_A counter is a 5-bit swallow counter, programmable from 0 to 31. The LMX243x IF_A counter is a 4-bit swallow counter, programmable from 0 to 15. For both the LMX2430 and LMX2433, the RF_B counter is a 15-bit binary counter, programmable from 3 to 32767. The LMX2434 RF_B counter is a 14-bit binary counter, programmable from 3 to 16383 ...

Page 35

Functional Description 1.5.1 Phase Comparator and Internal Charge Pump Characteristics Notes: 1. The minimum width of the pump-up and pump-down current pulses occur at the CPoutRF or CPoutIF pins when the loop is phase locked. 2. The diagram assumes ...

Page 36

Functional Description 1.8.3 Digital Filtered Lock Detect Output A digital filtered lock detect status generated from the phase detector is also available on the Ftest/LD output pin if se- lected. The lock detect digital filter compares the difference bewteen ...

Page 37

Functional Description 1.8.4 Reference Divider and Feedback Divider Output The outputs of the various N and R dividers can be moni- tored by selecting the appropriate Ftest/LD word. This is essential when performing OSCin or Fin sensitivity measure- ments. ...

Page 38

... DATA[20:0] FIELD RF_R[14:0] LMX2430/33 RF_B[14:0] LMX2434 RF_B[13: IF_R[14:0] IF_B[13: LSB LMX2430/33 RF_A[3:0] LMX2434 RF_A[4:0] RF_TOC[11:0] IF_A[3:0] IF_TOC[11: ADDRESS [2:0] FIELD ...

Page 39

Programming Description 2.4 R0 REGISTER The R0 register contains the RF_R, RF_CPP, RF_CPG, RF_CPT, and RF_RST control words, in addition to two of the four bits that compose the MUX control word. The detailed descriptions and programming information for ...

Page 40

... RF_A[3:0] - LMX2430/33 RF Synthesizer Swallow Counter (A Counter) (R1[6:3]) The RF_A control word is used to setup the RF synthesizer’s A counter. For both the LMX2430 and LMX2433, the A counter is a 4-bit swallow counter used in the programmable feedback divider. The RF_A control word can be programmed to values ranging from ...

Page 41

... RF_B[14:0] - LMX2430/33 RF Synthesizer Programmable Binary Counter (B Counter) (R1[21:7]) The RF_B control word is used to setup the RF synthesizer’s B counter. For both the LMX2430 and LMX2433, the B counter is a 15-bit programmable binary counter used in the programmable feedback divider. The RF_B control word can be programmed to values ranging from 3 to 32767 ...

Page 42

Programming Description 2.5.4 RF_PD - RF Synthesizer Powerdown (R1[23]) The RF_PD bit is used to switch the RF PLL between a powered up and powered down mode. Furthermore, the RF_PD bit operates in conjuction with the RF_CPT bit to ...

Page 43

Programming Description 2.7 R3 REGISTER The R3 register contains the IF_R, IF_CPP, IF_CPG, IF_CPT, and IF_RST control words, in addition to two of the four bits that compose the MUX control word. The detailed descriptions and programming information for ...

Page 44

Programming Description 2.7.3 IF_CPG - IF Synthesizer Charge Pump Current Gain (R3[19]) The IF_CPG bit controls the IF synthesizer’s charge pump gain. Two gain levels are available. Control Bit Register Location IF_CPG 2.7.4 IF_CPT - IF Synthesizer Charge Pump ...

Page 45

Programming Description 2.8.2 IF_B[13: Synthesizer Programmable Binary Counter (B Counter) (R4[20:7]) The IF_B control word is used to setup the IF synthesizer’s B counter. The B counter is a 14-bit programmable binary counter used in the programmable ...

Page 46

Programming Description 2.9 R5 REGISTER The R5 Register contains the IF_TOC control word. The IF_TOC is used to setup the IF syhnthesizer’s Fastlock circuitry. The IF_TOC is a 12-bit binary counter programmable from 0 to 4095. Reg 23 22 ...

Page 47

Programming Description 2.10 MUX[3:0] - MULTIFUNCTION OUTPUT SELECT (R3[23:22]:R0[23:22]) The MUX control word is used to determine which signal is routed to the Ftest/LD pin. MUX[3: ...

Page 48

Physical Dimensions www.national.com inches (millimeters) unless otherwise noted 20-Pin Ultra Thin Chip Scale Package (UTCSP) NS Package Number SLE20A 48 ...

Page 49

... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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