HD151012 Renesas Electronics Corporation., HD151012 Datasheet

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HD151012

Manufacturer Part Number
HD151012
Description
8-bit Binary Programmable Counter With Synchronous Preset Enable
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD151012TEL
Quantity:
31 800
Part Number:
HD151012TELL
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
HD151012
8-bit Binary Programmable Counter with Synchronous Preset
Enable
Description
The HD151012 has 8-bit binary down counter and D-type Flip Flop. The counter can set up to max 256 counts and
synchronous preset (SPE) input can preset the data. When the count value is 0, the next clock pulse presets the data to
invert the output. D-type Flip Flop takes the counter output as clock pulse, whose data is transferred to output at the
rise edge. It is applied to generate AC signal for STN type liquid crystal and general-use divider.
Features
HD151012TELL
Function Table
H
X
L
H
Notes: 1. Synchronous preset (SPE) input can set max 256 down counts.
H :
L :
X :
— :
Rev.2.00, Jul.16.2004, page 1 of 13
CLR
High speed operation
tpd (CLK or CLK to Q) = 35 ns (typ)
High output current
Fanout of 10 LS TTL Loads
Wide operating voltage
V
Low supply current (Ta = 25°C)
I
Ordering Information
CC
CC
(Static) = 4 µA (max)
High level
Low level
Immaterial
Irrespective of condition
= 2 to 6 V
Control Inputs
2. When the count value is 0, the next clock pulse presets the data to invert the output.
3. CLR and PR inputs initialize output state.
Part Name
H
X
H
L
PR
H
L
SPE
SPE
SPE
SPE
TSSOP-16 pin
Generally count
Synchronous preset
Initialize of Q output
Initialize of Q output
Package Type
Mode
TTP-16DAV
Package Code
Down count at the rise edge of clock (CLK)
Jn data is preset at the rise of clock (CLK), the fall of clock
Initialize of Q = “L”
Initialize of Q = “H”
Down count at the fall edge of clock (CLK)
(CLK)
T
Abbreviation
Package
Operation Description
(Previous ADE-205-132 (Z))
ELL (2,000 pcs/reel)
Taping Abbreviation
REJ03D0299–0200Z
(Quantity)
Jul.16.2004
Preliminary
Rev.2.00

Related parts for HD151012

HD151012 Summary of contents

Page 1

... Description The HD151012 has 8-bit binary down counter and D-type Flip Flop. The counter can set up to max 256 counts and synchronous preset (SPE) input can preset the data. When the count value is 0, the next clock pulse presets the data to invert the output ...

Page 2

... HD151012 Pin Arrangement Pin Description Pin Name Input pins CLK, CLK SPE PR CLR Output pins Q Absolute Maximum Ratings Item Supply voltage Input / output voltage VCC, GND current Output current / pin Power dissipation Storage temperature Input diode current Output diode current Notes: 1 ...

Page 3

... HD151012 Recommended Operating Conditions Item Supply voltage Input/output voltage Operating temperature 1 Input rise/fall time Note: 1. This item guarantees maximum limit when one input switches. Logic Diagram Rev.2.00, Jul.16.2004, page Symbol Min ...

Page 4

... HD151012 Electrical Characteristics Item Symbol V CC High level input V 2.0 IH voltage 4.5 6.0 2.0 4.5 6.0 Low level input V 2.0 IL voltage 4.5 6.0 2.0 4.5 6.0 High level output V 2.0 OH voltage 4.5 6.0 4.5 6.0 Low level output V 2.0 OL voltage 4.5 6.0 4.5 6.0 Input capacitance I 6.0 IN Supply current I 6.0 CC Rev.2.00, Jul.16.2004, page 25°C –40 to 85°C ...

Page 5

... HD151012 Switching Characteristics (C Sym- Item bol V CC Maximum clock f 2.0 max frequency 4.5 6.0 Output rise/fall time t 2.0 TLH t 4.5 THL 6.0 Propagation delay t 2.0 PLH time t 4.5 PHL 6.0 t 2.0 PLH t 4.5 PHL 6.0 Pulse width tw 2.0 (CLK, CLK, PR, CLR) 4.5 6.0 Setup time ts 2.0 (Jn - CLK, CLK) 4.5 (SPE, CLK, CLK) 6.0 Hold time th 2.0 (Jn - CLK, CLK) 4 ...

Page 6

... HD151012 Test Circuit Pulse generator out Pulse generator out Note includes probe and jig capacitance. L Waveforms – CLK CLK t PLH TLH Rev.2.00, Jul.16.2004, page Input Input CLK ...

Page 7

... HD151012 Waveforms – CLK CLK *1 F/F Output Waveforms – CLK CLK *1 F/F Output Note: 1. F/F output is internal signal of IC. Rev.2.00, Jul.16.2004, page Internal delay Internal delay ...

Page 8

... HD151012 Waveforms – 4 SPE CLK CLK *1 F/F Output Waveforms – 5 SPE CLK CLK *1 F/F Output Note: 1. F/F output is internal signal of IC. Rev.2.00, Jul.16.2004, page Internal delay Internal delay ...

Page 9

... HD151012 Waveforms – CLR Rev.2.00, Jul.16.2004, page PHL PLH GND GND ...

Page 10

... HD151012 Timing Chart CLK SPE (CO=SPE) CLR (Initialize of CLR (Initialize of PR) Q Count Rev.2.00, Jul.16.2004, page ...

Page 11

... HD151012 Example of Application Circuit AC Signal Generator for STN Type Liquid Crystal Panel Initialize counter: 50 Note: When initializing output D-F/F apply “L” Rev.2.00, Jul.16.2004, page CLK J 1 CLK SPE CLR GND ...

Page 12

... HD151012 Timing Chart Example of AC Signal Generator 1 CLK SPE (CO=SPE) CLR Count Rev.2.00, Jul.16.2004, page 101 102 103 104 ...

Page 13

... HD151012 Package Dimensions 5.00 5.30 Max 0.20 ± 0.05 0.65 Max *Ni/Pd/Au plating Rev.2.00, Jul.16.2004, page 0.65 0.13 M 6.40 ± 0.20 0˚ – 8˚ 0.10 Package Code JEDEC JEITA Mass (reference value January, 2003 Unit: mm 1.0 0.50 ± 0.10 TTP-16DAV — — 0.05 g ...

Page 14

Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...

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