HT36A4 Holtek Semiconductor Inc., HT36A4 Datasheet
HT36A4
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HT36A4 Summary of contents
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... Polyphonic notes Independent volume mix can be assigned to each sound component General Description The HT36A4 is an 8-bit high performance RISC-like microcontroller specifically designed for music applica- tions. It provides an 8-bit MCU and a 8 channel wavetable synthesizer. The program ROM is composed of both program control codes and wavetable voice codes, and can be easily programmed ...
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... Pin Assignment Pad Assignment * The IC substrate should be connected to VSS in the PCB layout artwork. Rev. 1.10 2 Chip size: 2140 2560 ( m) 2 HT36A4 March 12, 2007 ...
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... Function =f /8). The system clock may come from the OSC2 OSC +5.5V Storage Temperature .......................... 125 C SS +0.3V Operating Temperature ....................... HT36A4 Unit 994.626 316.774 1006.000 1116.600 1114.025 1114.025 1114.025 1114.025 March 12, 2007 ...
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... =4.5V 5 = Test Conditions Min. V Conditions DD 5V 8MHz crystal 5V 4 Without WDT prescaler HT36A4 Ta=25 C Typ. Max. Unit 2.5 V Ta=25 C Typ. Max. Unit 8 MHz 8 MHz ...
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... Characteristics Curves Characteristics Curve Rev. 1.10 5 HT36A4 March 12, 2007 ...
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... Characteristics Curve Function Description Execution Flow The system clock for the HT36A4 is derived from either a crystal oscillator. The oscillator frequency di- vided the system clock for the MCU ( and it is internally divided into four OSC SYS non-overlapping clocks. One instruction cycle consists of four system clock cycles ...
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... Once a control transfer takes place, an additional dummy cycle is required. Program ROM HT36A4 provides 15 address lines WA[14:0] to read the Program ROM which 512K bits, and is com- monly used for the wavetable voice codes and the pro- gram memory. It provides two address types, one type is for program ROM, which is addressed by a bank pointer PF1~0 and a 13-bit program counter PC 12~0 ...
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... Wavetable ROM The ST[10~0] is used to defined the start address of each sample on the wavetable and read the waveform data from the location. HT36A4 provides 16 output ad- dress lines from WA[15~0], the ST[10~0] is used to lo- cate the major 16 bits i.e. WA[15~5] and the undefined data from WA[4~0] is always set to 00000b. So the start address of each sample have to be located at a multiple of 32 ...
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... Interrupt The HT36A4 provides two internal Timer Counter inter- rupts on each bank. The Interrupt Control register (INTC;0BH) contains the interrupt control bits that sets the enable/disable and the interrupt request flags. ...
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... CALL subroutine operates in the inter- rupt subroutine, it may damage the original control sequence. Oscillator Configuration The HT36A4 provides two types of oscillator circuit for the system clock, i.e., RC oscillator and crystal oscilla- tor. No matter what type of oscillator, the signal divided used for the system clock (f HALT mode stops the system oscillator and ignores ex- ternal signal to conserve power ...
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... In this situation the logic can only be restarted by external logic. The high nibble and bit 3 of the WDTS are reserved for user defined flags, and the programmer may use these flags to indicate some specified status. Watchdog Timer 11 HT36A4 March 12, 2007 ...
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... If an interrupt request flag is set to 1 before entering the HALT mode, the wake-up function of the related interrupt will be disabled. To minimize power consumption, all I/O pins should be carefully managed before entering the HALT status. 12 HT36A4 (sys- SYS March 12, 2007 ...
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... The functional units chip reset status are shown below. Program Counter 000H Interrupt Disable Prescaler Clear Clear. After master reset, WDT WDT begins counting Timer Counter (0/1) Off Input/output ports Input mode Stack Pointer Points to the top of stack Reset Timing Chart Reset Configuration 13 HT36A4 March 12, 2007 ...
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... HT36A4 RES Reset WDT Time-out (HALT) (HALT)* uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu 0000H 0000H uuuu uuuu ...
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... If the control register bit the con- tents of the latches will move to the internal bus. The latter is possible in read-modify-write instruction. For output function, CMOS is the only configuration. These control registers are mapped to locations 13H. Input/Output Ports 15 HT36A4 Timer 0/1 March 12, 2007 ...
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... BL3 BL2 BL1 BL0 FR7 FR6 FR5 FR4 ST7 ST6 ST5 ST4 WBS RE7 RE6 RE5 RE4 VR7 VR6 VR5 VR4 16 HT36A4 DA9 DA8 DA1 DA0 DAON SELW CH1 CH0 FR9 FR8 FR1 FR0 ST9 ST8 ST1 ST0 RE9 RE8 ...
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... The PCM code definition The HT36A4 can only solve the voice format of the signed 8-bit raw PCM. And the MCU will take the voice code 80H as the end code. So each PCM code section must be ended with the end code 80H ...
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... Mask Option 1 WDT source On-chip RC/Instruction clock/ disable WDT 2 CLRWDT times One time, two times (CLR WDT1/WDT2) 3 Wake- Pull-High PA input 5 OSC mode Crystal or Resistor type Application Circuits Rev. 1.10 Function HT36A4 W W March 12, 2007 ...
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... Rotate data memory left through carry Data Move MOV A,[m] Move data memory to ACC MOV [m],A Move ACC to data memory MOV A,x Move immediate data to ACC Bit Operation CLR [m].i Clear bit of data memory SET [m].i Set bit of data memory Rev. 1.10 Description 19 HT36A4 Instruction Flag Cycle Affected 1 Z,C,AC,OV (1) 1 Z,C,AC,OV 1 Z,C,AC,OV 1 Z,C,AC,OV (1) 1 ...
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... The flags may be affected by the execution status. If the Watchdog Timer is cleared by executing the CLR WDT1 or CLR WDT2 instruction, the TO and PDF are cleared. Otherwise the TO and PDF flags remain unchanged. Rev. 1.10 Description 20 HT36A4 Instruction Flag Cycle Affected 2 None (2) 1 None ...
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... Add the accumulator to the data memory Description The contents of the specified data memory and the accumulator are added. The result is stored in the data memory. Operation [m] ACC+[m] Affected flag(s) TO Rev. 1.10 PDF PDF PDF PDF PDF HT36A4 March 12, 2007 ...
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... Program Counter+1 Program Counter Affected flag(s) TO CLR [m] Clear data memory Description The contents of the specified data memory are cleared to 0. Operation [m] 00H Affected flag(s) TO Rev. 1.10 PDF PDF PDF addr PDF PDF HT36A4 March 12, 2007 ...
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... Each bit of the specified data memory is logically complemented (1 s complement). Bits which previously contained a 1 are changed to 0 and vice-versa. Operation [m] [m] Affected flag(s) TO Rev. 1.10 PDF PDF PDF PDF PDF HT36A4 March 12, 2007 ...
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... Data in the specified data memory is decremented by 1, leaving the result in the accumula- tor. The contents of the data memory remain unchanged. Operation ACC [m] 1 Affected flag(s) TO Rev. 1.10 PDF (ACC.3~ACC.0)+6, AC1=AC (ACC.3~ACC.0), AC1=0 ACC.7~ACC.4+6+AC1,C=1 ACC.7~ACC.4+AC1,C=C PDF PDF PDF HT36A4 March 12, 2007 ...
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... Move data memory to the accumulator Description The contents of the specified data memory are copied to the accumulator. Operation ACC [m] Affected flag(s) TO Rev. 1.10 Program Counter+1 PDF PDF PDF addr PDF PDF HT36A4 March 12, 2007 ...
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... Data in the data memory (one of the data memories) and the accumulator perform a bitwise logical_OR operation. The result is stored in the data memory. Operation [m] ACC OR [m] Affected flag(s) TO Rev. 1.10 PDF PDF Program Counter+1 PDF PDF PDF PDF HT36A4 March 12, 2007 ...
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... The contents of the data memory remain unchanged. Operation ACC.(i+1) ACC.0 [m].7 Affected flag(s) TO Rev. 1.10 Stack PDF Stack PDF Stack PDF PDF [m].i; [m].i:bit i of the data memory (i=0~6) PDF HT36A4 March 12, 2007 ...
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... Bit 0 replaces the carry bit; the original carry flag is rotated into the bit 7 position. Operation [m].i [m].(i+1); [m].i:bit i of the data memory (i=0~6) [m]. [m].0 Affected flag(s) TO Rev. 1.10 PDF [m].i; [m].i:bit i of the data memory (i=0~6) PDF PDF PDF PDF HT36A4 March 12, 2007 ...
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... Otherwise proceed with the next instruction (1 cycle). Operation Skip if ([m] 1)=0, ACC Affected flag(s) TO Rev. 1.10 PDF PDF PDF ([m] 1) PDF ([m] 1) PDF HT36A4 March 12, 2007 ...
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... Other- wise proceed with the next instruction (1 cycle). Operation Skip if [m].i 0 Affected flag(s) TO Rev. 1.10 PDF PDF ([m]+1) PDF ([m]+1) PDF PDF HT36A4 March 12, 2007 ...
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... The low-order and high-order nibbles of the specified data memory are interchanged, writ- ing the result to the accumulator. The contents of the data memory remain unchanged. Operation ACC.3~ACC.0 ACC.7~ACC.4 Affected flag(s) TO Rev. 1.10 PDF PDF PDF [m].7~[m].4 PDF [m].7~[m].4 [m].3~[m].0 PDF HT36A4 March 12, 2007 ...
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... The low byte of ROM code (last page) addressed by the table pointer (TBLP) is moved to the data memory and the high byte transferred to TBLH directly. Operation [m] ROM code (low byte) TBLH ROM code (high byte) Affected flag(s) TO Rev. 1.10 PDF PDF PDF PDF PDF HT36A4 March 12, 2007 ...
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... Logical XOR immediate data to the accumulator Description Data in the accumulator and the specified data perform a bitwise logical Exclusive_OR op- eration. The result is stored in the accumulator. The 0 flag is affected. Operation ACC ACC XOR x Affected flag(s) TO Rev. 1.10 PDF PDF PDF HT36A4 March 12, 2007 ...
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... Package Information 16-pin DIP (300mil) Outline Dimensions Symbol Rev. 1.10 Dimensions in mil Min. Nom. 745 240 125 125 16 50 100 295 335 0 34 HT36A4 Max. 775 260 135 145 20 70 315 375 15 March 12, 2007 ...
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... SOP (300mil) Outline Dimensions Symbol Rev. 1.10 Dimensions in mil Min. Nom. 394 290 14 390 HT36A4 Max. 419 300 20 413 104 March 12, 2007 ...
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... Product Tape and Reel Specifications Reel Dimensions SOP 16W (300mil) Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.10 Dimensions in mm 330 1 62 1.5 13 0.5 0.2 2 0.5 16.8+0.3 0.2 22.2 0.2 36 HT36A4 March 12, 2007 ...
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... Carrier Tape Width P Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K0 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.10 Dimensions 0.2 12 0.1 1.75 0.1 7.5 0.1 1.5+0.1 1.5+0.25 4 0.1 2 0.1 10.9 0.1 10.8 0.1 3 0.1 0.3 0.05 13.3 37 HT36A4 March 12, 2007 ...
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... Holtek s products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.10 38 HT36A4 March 12, 2007 ...