DSPIC33FJ12MC202 Microchip Technology Inc., DSPIC33FJ12MC202 Datasheet - Page 86

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DSPIC33FJ12MC202

Manufacturer Part Number
DSPIC33FJ12MC202
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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dsPIC33FJ12MC201/202
REGISTER 6-17:
DS70265B-page 84
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11-7
bit 6-4
bit 3
bit 2-0
U-0
U-0
Unimplemented: Read as ‘0’
CNIP<2:0>: Change Notification Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
MI2C1IP<2:0>: I2C1 Master Events Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
SI2C1IP<2:0>: I2C1 Slave Events Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
R/W-1
R/W-1
IPC4: INTERRUPT PRIORITY CONTROL REGISTER 4
MI2C1IP<2:0>
W = Writable bit
‘1’ = Bit is set
CNIP<2:0>
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
R/W-1
U-0
© 2007 Microchip Technology Inc.
SI2C1IP<2:0>
x = Bit is unknown
R/W-0
U-0
R/W-0
U-0
bit 8
bit 0

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