SPFMOR302 Avago Technologies, SPFMOR302 Datasheet

no-image

SPFMOR302

Manufacturer Part Number
SPFMOR302
Description
Plastic Fiber Optic Receiver For Most
Manufacturer
Avago Technologies
Datasheet
Actual design status
IC Revision
J
SPF MOR3 02
Plastic Fiber Optic Receiver for MOST®
Data Sheet
Description
The 4-pin MOST Optical Receiver (MOR3 02) is a highly
integrated CMOS IC combined with a high speed PIN
- diode designed to receive up to 25Mbit/s optical data
which is bi-phase coded at up to 50Mbaud and convert
this optical data to a TTL compatible data stream.
This high performance, low cost, CMOS receiver consists
of a low noise transimpedance amplifier and comparator
in the data path. A timer circuit puts the part into a low
power mode if optical data is not received for 10µs (typ.).
During the low power mode, the PIN diode is still being
observed and if activity is detected, The IC will resume full
power operation within 3.5ms (typ.).
A STATUS-pin indicates if modulated light is received
(Light on -> STATUS = low). With the STATUS-pin the
power supply of the whole MOST device can be switched
ON.
SPF MOR3 02
package type Optical Sensitivity device marking
CAI
-24.5 dBm
MOR3 02
Features
Excellent solution for converting high speed data from
Plastic Optical Fiber (POF) to digital output.
Applications
High speed receiver up to 50 MBaud
(25Mbit/s net data rate)
TTL Data Output (Light to Logic Function)
Network activity sensing during ZeroPower Mode
(I
BUS Activity Status Output
Good 650nm sensitivity for working in a low
attenuation range of PMMA Fiber
Low cost
Optical Receiver for MOST Systems
CC
<10µA)

Related parts for SPFMOR302

SPFMOR302 Summary of contents

Page 1

SPF MOR3 02 Plastic Fiber Optic Receiver for MOST® Data Sheet Description The 4-pin MOST Optical Receiver (MOR3 02 highly integrated CMOS IC combined with a high speed PIN - diode designed to receive up to 25Mbit/s optical ...

Page 2

Maximum Ratings Parameter Symbol Storage Temperature Range T STG Junction Temperature T J Soldering Temperature T S (>2.5 mm from case bottom t£5s) Power Dissipation P TOT Power Supply Voltage V CCMax DC Current To Any Pin Except Power I ...

Page 3

DC Characteristics Parameter Test Conditions Supply Voltage Low Level Output Voltage I = 2.4mA OL High Level Output Voltage I = 2.4mA OH Supply Current Full power mode Low power mode Mechanical Design MOR3 02: CAI package (cavity as interface) ...

Page 4

Application Circuit: Notes: 1. Place these components as close as possible to their corresponding pins of the FOT. 2. Values can change due to different light output power of the LED. 3. This is just a proposal for the Rext ...

Page 5

Design & Layout rules • The 100nF bypass capacitors of the FOTs must be located as close as possible between the pins V FOTs. Use ceramic caps and tantalum caps with low ESR. • Also the inductor/ ferrite bead (receiver) ...

Page 6

Top Layer with 180˚ version of the pigtail: Bottom Layer (seen from the top side of the PCB): Other items • The shown circuit for the –3dB attenuation is just a proposal. Also any other circuit which can double the ...

Page 7

... For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright © 2008 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0732EN AV02-0987EN - January 11, 2008 www ...

Related keywords